llvm-svn: 72411

llvm-svn: 71769

operand was killed, the kill needs to be removed from regB's VarInfo.

llvm-svn: 71635

llvm-svn: 71275

llvm-svn: 70279

Fix PR3934 part 2. findOnlyInterestingUse() was not setting IsCopy and IsDstPhys which are returned by value and used by callee. This happened to work on the earlier test cases because of a logic error in the caller side.

llvm-svn: 69006

llvm-svn: 68979

llvm-svn: 68953

with SUBREG_TO_REG, teach SimpleRegisterCoalescing to coalesce
SUBREG_TO_REG instructions (which are similar to INSERT_SUBREG
instructions), and teach the DAGCombiner to take advantage of this on
targets which support it. This eliminates many redundant
zero-extension operations on x86-64.

This adds a new TargetLowering hook, isZExtFree. It's similar to
isTruncateFree, except it only applies to actual definitions, and not
no-op truncates which may not zero the high bits.

Also, this adds a new optimization to SimplifyDemandedBits: transform
operations like x+y into (zext (add (trunc x), (trunc y))) on targets
where all the casts are no-ops. In contexts where the high part of the
add is explicitly masked off, this allows the mask operation to be
eliminated. Fix the DAGCombiner to avoid undoing these transformations
to eliminate casts on targets where the casts are no-ops.

Also, this adds a new two-address lowering heuristic. Since
two-address lowering runs before coalescing, it helps to be able to
look through copies when deciding whether commuting and/or
three-address conversion are profitable.

Also, fix a bug in LiveInterval::MergeInClobberRanges. It didn't handle
the case that a clobber range extended both before and beyond an
existing live range. In that case, multiple live ranges need to be
added. This was exposed by the new subreg coalescing code.

Remove 2008-05-06-SpillerBug.ll. It was bugpoint-reduced, and the
spiller behavior it was looking for no longer occurrs with the new
instruction selection.

llvm-svn: 68576

Turn a 2-address instruction into a 3-address one when it's profitable even if the two-address operand is killed.
e.g.
%reg1024<def> = MOV r1
%reg1025<def> = ADD %reg1024, %reg1026
r0            = MOV %reg1025

If it's not possible / profitable to commute ADD, then turning ADD into a LEA saves a copy.

llvm-svn: 68065

Model inline asm constraint which ties an input to an output register as machine operand TIED_TO constraint. This eliminated the need to pre-allocate registers for these. This also allows register allocator can eliminate the unneeded copies.

llvm-svn: 67512

llvm-svn: 67335

Look for situations like this:                                                                                                                                                              
%reg1024<def> = MOV r1                                                                                                                                                                      
%reg1025<def> = MOV r0                                                                                                                                                                      
%reg1026<def> = ADD %reg1024, %reg1025                                                                                                                                                      
r0            = MOV %reg1026                                                                                                                                                                
Commute the ADD to hopefully eliminate an otherwise unavoidable copy.

llvm-svn: 65752

If two-address def is dead and the instruction does not define other registers, and it doesn't produce side effects, just delete the instruction.

llvm-svn: 65218

llvm-svn: 63198

Teach 2addr pass to be do more commuting. If both uses of a two-address instruction are killed, but the first operand has a use before and after the def, commute if the second operand does not suffer from the same issue.
%reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1                                                                                                                                     
%reg1029<def> = MOV8rr %reg1028                                                                                                                                                      
%reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead>                                                                                                                            
insert => %reg1030<def> = MOV8rr %reg1028                                                                                                                                            
%reg1030<def> = ADD8rr %reg1028<kill>, %reg1029<kill>, %EFLAGS<imp-def,dead>                                                                                                         

In this case, it might not be possible to coalesce the second MOV8rr                                                                                                                 
instruction if the first one is coalesced. So it would be profitable to                                                                                                              
commute it:                                                                                                                                                                          
%reg1028<def> = EXTRACT_SUBREG %reg1027<kill>, 1                                                                                                                                     
%reg1029<def> = MOV8rr %reg1028                                                                                                                                                      
%reg1029<def> = SHR8ri %reg1029, 7, %EFLAGS<imp-def,dead>                                                                                                                            
insert => %reg1030<def> = MOV8rr %reg1029                                                                                                                                            
%reg1030<def> = ADD8rr %reg1029<kill>, %reg1028<kill>, %EFLAGS<imp-def,dead>

llvm-svn: 62954

llvm-svn: 62893

llvm-svn: 61715

the debug output, so that the updated liveness flags are
reflected in the debug output.

llvm-svn: 59147

llvm-svn: 57259

isReg, etc., from isRegister, etc.

llvm-svn: 57006

llvm-svn: 55779

llvm-svn: 55434

llvm-svn: 55430

- Remove calls to copyKillDeadInfo which is an N^2 function. Instead, propagate kill / dead markers as new instructions are constructed in foldMemoryOperand, convertToThressAddress, etc.
- Also remove LiveVariables::instructionChanged, etc. Replace all calls with cheaper calls which update VarInfo kill list.

llvm-svn: 53097

- Add LiveVariables::replaceKillInstruction. This does a subset of instructionChanged. That is, it only update the VarInfo.kills if the new instruction is known to have the correct dead and kill markers.
- CommuteInstruction copies kill / dead markers over to new instruction. So use replaceKillInstruction instead.

llvm-svn: 53061

Make LiveVariables even more optional, by making it optional in the call to TargetInstrInfo::convertToThreeAddressInstruction
Also, if LV isn't around, then TwoAddr doesn't need to be updating flags, since they won't have been set in the first place.

llvm-svn: 53058

TwoAddressInstructionPass doesn't really require LiveVariables, it just needs to update it if it's already around.

llvm-svn: 53049

llvm-svn: 52920

llvm-svn: 52701

llvm-svn: 52487

llvm-svn: 52452

like.

llvm-svn: 51662

that it's safe to remat an instruction.

llvm-svn: 51659

before deleting the instruction.

llvm-svn: 51609

Running /Users/void/llvm/llvm.src/test/CodeGen/X86/dg.exp ...
FAIL: /Users/void/llvm/llvm.src/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll
Failed with exit(1) at line 1
while running: llvm-as < /Users/void/llvm/llvm.src/test/CodeGen/X86/2007-11-30-LoadFolding-Bug.ll | llc -march=x86 -mattr=+sse2 -stats |&  grep {1 .*folded into instructions}
child process exited abnormally

Make this conditional for now.

llvm-svn: 51563

LBB1_3:   # bb
...
        xorl    %ebp, %ebp
        subl    (%ebx), %ebp
...
        incl    %ecx
        cmpl    %edi, %ecx
        jl      LBB1_3  # bb

Whe using machine LICM, LLVM converts it into:

        xorl %esi, %esi
LBB1_3: # bb
...
        movl    %esi, %ebp
        subl    (%ebx), %ebp
...
        incl    %ecx
        cmpl    %edi, %ecx
        jl      LBB1_3  # bb

Two address conversion inserts the copy instruction. However, it's cheaper to
rematerialize it, and remat helps reduce register pressure.

llvm-svn: 51562

address of the PassInfo directly instead of calling getPassInfo.
This eliminates a bunch of dynamic initializations of static data.

Also, fold RegisterPassBase into PassInfo, make a bunch of its
data members const, and rearrange some code to initialize data
members in constructors instead of using setter member functions.

llvm-svn: 51022

several things that were neither in an anonymous namespace nor static
but not intended to be global.

llvm-svn: 51017

 - Comment fixes.
 - Moar whitespace.
 - Made ivars "private" by default.
No functionality change.

llvm-svn: 50926