instructions.

llvm-svn: 155453

llvm-svn: 155452

llvm-svn: 155449

Instead of -polly-run-import-jscop and -polly-run-export-jscop, we just use
-polly-import and -polly-export.

llvm-svn: 155446

We now support -polly-optimizer=isl, -polly-optimizer=pocc and
-polly-optimizer=none. The option -polly-no-optimizer is gone.

llvm-svn: 155445

instructions.

llvm-svn: 155444

fix a typo
add punctuation

llvm-svn: 155443

llvm-svn: 155441

immediate. We can't use it here because the shuffle code does not check that
the lower part of the word is identical to the upper part.

llvm-svn: 155440

llvm-svn: 155439

llvm-svn: 155438

using the pattern (vbroadcast (i32load src)). In some cases, after we generate
this pattern new users are added to the load node, which prevent the selection
of the blend pattern. This commit provides fallback patterns which perform
in-vector broadcast (using in-vector vbroadcast in AVX2 and pshufd on AVX1).

llvm-svn: 155437

a simulator.

llvm-svn: 155436

Look for the 'Is Simulated' module flag. This indicates that the program is compiled to run on a simulator.

llvm-svn: 155435

llvm-svn: 155434

llvm-svn: 155433

llvm-svn: 155432

llvm-svn: 155431

llvm-svn: 155430

llvm-svn: 155429

llvm-svn: 155428

llvm-svn: 155427

class; we would never actually parse it and attach it to the type.

llvm-svn: 155426

header, along with a stub test to make sure it compiles in the
appropriate modes.

Thanks to Aaron Ballman for working with me to figure out the initial
strategy here, and to Nico for reviewing and pestering me to actually
commit it.

llvm-svn: 155425

exception specification to a function.

llvm-svn: 155424

llvm-svn: 155423

llvm-svn: 155422

into the middle of a vector was being used after the vector may
have been resized.  
<rdar://problem/11284937>

llvm-svn: 155421

llvm-svn: 155420

Removing the @expectedFailurei386 decorator from test cases that now work as a result of the latest changes to Value.cpp

llvm-svn: 155419

This patch fixes a bug where LLDB was incorrectly setting the address-size on a DataExtractor to be sizeof(void*) when the ValueObject came out of the expression parser
This worked correctly for 64-bit targets, but broke down data formatters in i386 mode. The formatters would try to read pointers out of the frozen-dried objects,
but were unable to do so because they would try fetching 8 bytes from a DataExtractor with only 4 bytes in it. This patch fixes the issue by always making the pointer-size
for a DataExtractor match the target setting.

llvm-svn: 155418

clang/test/Rewriter/objc-modern-boxing.mm: Mark as XFAIL:mingw for now, due to predefined __declspec similar to r155278.

llvm-svn: 155417

llvm-svn: 155407

Added the ability to log a message with a backtrace when verbose logging is enabled to the Module class. Used this new function in the DWARF parser.

llvm-svn: 155404

llvm-svn: 155402

llvm-svn: 155399

Fixed an issue where we get NULL compile units back from the symbol vendor. We need symbol vendors to be able to quickly give an estimate of the compile units that they have without having to fully vette them first, so anyone getting compile units from a module should be able to deal with a NULL compile unit being returned for a given index.

llvm-svn: 155398

Optimize the vector UINT_TO_FP, SINT_TO_FP and FP_TO_SINT operations where the integer type is i8 (commonly used in graphics).

llvm-svn: 155397

on X86 Atom. Some of our tests failed because the tail merging part of
the BranchFolding pass was creating new basic blocks which did not
contain live-in information. When the anti-dependency code in the Post-RA
scheduler ran, it would sometimes rename the register containing
the function return value because the fact that the return value was
live-in to the subsequent block had been lost. To fix this, it is necessary
to run the RegisterScavenging code in the BranchFolding pass.

This patch makes sure that the register scavenging code is invoked
in the X86 subtarget only when post-RA scheduling is being done.
Post RA scheduling in the X86 subtarget is only done for Atom.

This patch adds a new function to the TargetRegisterClass to control
whether or not live-ins should be preserved during branch folding.
This is necessary in order for the anti-dependency optimizations done
during the PostRASchedulerList pass to work properly when doing
Post-RA scheduling for the X86 in general and for the Intel Atom in particular.

The patch adds and invokes the new function trackLivenessAfterRegAlloc()
instead of using the existing requiresRegisterScavenging().
It changes BranchFolding.cpp to call trackLivenessAfterRegAlloc() instead of
requiresRegisterScavenging(). It changes the all the targets that
implemented requiresRegisterScavenging() to also implement
trackLivenessAfterRegAlloc().  

It adds an assertion in the Post RA scheduler to make sure that post RA
liveness information is available when it is needed.

It changes the X86 break-anti-dependencies test to use –mcpu=atom, in order
to avoid running into the added assertion.

Finally, this patch restores the use of anti-dependency checking
(which was turned off temporarily for the 3.1 release) for
Intel Atom in the Post RA scheduler.

Patch by Andy Zhang!

Thanks to Jakob and Anton for their reviews.

llvm-svn: 155395

llvm-svn: 155393