FunctionTemplateSpecializationInfo, in DeclTemplate.h. No functionality change.

llvm-svn: 74431

llvm-svn: 74430

Add processor descriptions for Istanbul and Shanghai.

llvm-svn: 74429

Fix a subtarget feature bug.

llvm-svn: 74428

Add more vector ValueTypes for AVX and other extended vector instruction
sets.

llvm-svn: 74427

llvm-svn: 74426

Convert clients to use ASTContext::getObjCObjectPointerType().

llvm-svn: 74424

Rename ARMcmpNZ to ARMcmpZ and use it to represent comparisons that set only the Z flag (i.e. eq and ne). Make ARMcmpZ commutative.

llvm-svn: 74423

llvm-svn: 74422

to make sure ThumbRegisterInfo.cpp are compiled and linked in.
Patch by Xerxes.

llvm-svn: 74421

After much back and forth, I decided to deviate from ARM design and split LDR into 4 instructions (r + imm12, r + imm8, r + r << imm12, constantpool). The advantage of this is 1) it follows the latest ARM technical manual, and 2) makes it easier to reduce the width of the instruction later. The down side is this creates more inconsistency between the two sub-targets. We should split ARM LDR instruction in a similar fashion later. I've added a README entry for this.

llvm-svn: 74420

llvm-svn: 74419

llvm-svn: 74418

Implemented by making lib/CompilerDriver a shared library that holds all the
global static data (CommandLine options, plugin registry) that we unfortunately
have to live with.

llvm-svn: 74417

llvm-svn: 74416

llvm-svn: 74415

llvm-svn: 74414

llvm-svn: 74413

llvm-svn: 74412

The issue this was working around is no longer present in TOT clang.

llvm-svn: 74411

llvm-svn: 74410

handled by RetrieveArray().

llvm-svn: 74409

symbol.

llvm-svn: 74408

llvm-svn: 74407

memregion.

llvm-svn: 74406

function attributes. There are predefined macros that are defined when stack
protectors are used: __SSP__=1 with -fstack-protector and __SSP_ALL__=2 with
-fstack-protector-all.

llvm-svn: 74405

Handle rules for ExtVector + ExtVector and ExtVector + Scalar operations. 
Fix problem Eli noticed where we were allowing pointer types to be splatted to
vector elements.

llvm-svn: 74404

llvm-svn: 74402

llvm-svn: 74401

llvm-svn: 74400

doesn't have an IV-based operand. This fixes PR4471.

llvm-svn: 74399

LoopInfo will handle removing it from the Loop, as well as updating
its own tables.

llvm-svn: 74398

llvm-svn: 74397

when one of them can be converted to a trivial icmp and conditional
branch.

This addresses what is essentially a phase ordering problem.
SimplifyCFG knows how to do this transformation, but it doesn't do so
if the primary block has any instructions in it other than an icmp and
a branch. In the given testcase, the block contains other instructions,
however they are loop-invariant and can be hoisted. SimplifyCFG doesn't
have LoopInfo though, so it can't hoist them. And, it's important that
the blocks be merged before LoopRotation, as it doesn't support
multiple-exit loops.

llvm-svn: 74396

llvm-svn: 74395

llvm-svn: 74394

of a team of individual allocations and a team of std::maps.

llvm-svn: 74393

llvm-svn: 74392

llvm-svn: 74391

llvm-svn: 74390