When a PHI use is <undef>, don't emit a copy in the predecessor block,
but insert an IMPLICIT_DEF instruction instead. This ensures that
virtual register uses are always jointly dominated by defs, even if some
of them are IMPLICIT_DEF.

llvm-svn: 159121

When the source register to a 2-addr instruction is undefined, there is
no need to attempt any transformations - simply replace the source
register with the destination register.

This also comes up when lowering IMPLICIT_DEF instructions - make sure
the <undef> flag is moved to the new partial register def operand:

  %vreg8<def> = INSERT_SUBREG %vreg9<undef>, %vreg0<kill>, sub_16bit
rewrite undef:
  %vreg8<def> = INSERT_SUBREG %vreg8<undef>, %vreg0<kill>, sub_16bit
convert to:
  %vreg8:sub_16bit<def,read-undef> = COPY %vreg0<kill>

llvm-svn: 159120

The function live-out registers must be live at all function returns,
and %RCX is only used by eh.return. When a function also has a normal
return, only %RAX holds a return value.

This fixes PR13188.

llvm-svn: 159116

llvm-svn: 159112

These are used as the result of comparisons, and often handled differently from larger integer types.

llvm-svn: 159111

the safety check to look for the same type we're going to actually cast to.
Fixes PR13180!

llvm-svn: 159110

llvm-svn: 159109

llvm-svn: 159108

llvm-svn: 159107

llvm-svn: 159106

llvm-svn: 159105

llvm-svn: 159104

FYI, two arguments of strerror_s() is provided in C++ on msvc.

llvm-svn: 159103

FIXME: Shall we put *.def(s) to the folder?
llvm-svn: 159102

msvc mis-infers ParentTy(RHS) to (const RangesCollectionTy &).

llvm-svn: 159101

llvm-svn: 159100

llvm-svn: 159099

llvm-svn: 159098

VMCore/CMakeLists.txt: [CMake][MSVC] Add "/Og-" to Function.cpp on msvc10. Otherwise, it took over 20 minutes to compile.

FIXME: Suppressing optimizations to core libraries would not be good thing.
llvm-svn: 159097

llvm-svn: 159096

llvm-svn: 159094

llvm-svn: 159092

llvm-svn: 159090

llvm-svn: 159088

Make CVTDQ2PS instruction use SSE2 predicate instead of SSE1. No functional change because there are no patterns in the instructions. Also fix a typo in a comment.

llvm-svn: 159087

Move CVTPD2DQ to use SSE2 predicate instead of SSE3. Move DQ2PD and PD2DQ to the SSE2 section of the file.

llvm-svn: 159086

llvm-svn: 159082

llvm-svn: 159081

Remove temporary GlobalVariable constructors now that Clang has been
updated (r159078).

llvm-svn: 159079

This allows the user/front-end to specify a model that is better
than what LLVM would choose by default. For example, a variable
might be declared as

  @x = thread_local(initialexec) global i32 42

if it will not be used in a shared library that is dlopen'ed.

If the specified model isn't supported by the target, or if LLVM can
make a better choice, a different model may be used.

llvm-svn: 159077

Optimized usage of new SwitchInst case values (IntegersSubset type) in Local.cpp, Execution.cpp and BitcodeWriter.cpp.
I got about 1% of compile-time improvement on my machines (Ubuntu 11.10 i386 and Ubuntu 12.04 x64).

llvm-svn: 159076

llvm-svn: 159075

llvm-svn: 159074

llvm-svn: 159073

llvm-svn: 159071

Remove intrinsic specific instructions for 128-bit (V)CVTDQ2PD. Replace with intrinsic patterns. Mem forms omitted because the load size is only 64-bits.

llvm-svn: 159070

It's simple: Don't treat <undef> operands as uses, and don't assume a
virtual register has a defining instruction unless a real use has been
seen.

llvm-svn: 159061

llvm-svn: 159058

There are patterns to handle immediates when they fit in the immediate field.
e.g. %sub = add i32 %x, -123
=>   sub r0, r0, #123
Add patterns to catch immediates that do not fit but should be materialized
with a single movw instruction rather than movw + movt pair.
e.g. %sub = add i32 %x, -65535
=>   movw r1, #65535
     sub r0, r0, r1

rdar://11726136

llvm-svn: 159057

llvm-svn: 159055