alternative register allocator that does not require LiveIntervals by specifying
it on the command-line for a target that has StrongPHIElimination enabled by
default.

These checks are pretty meaningless anyways, since StrongPHIElimination and
PHIElimination are never used at the same time.

llvm-svn: 122176

profitable (or safe) to promote code when the add-with-constant
has other uses.

llvm-svn: 122175

helper function, clean up comments, and reduce indentation.
No functionality change.

llvm-svn: 122174

which doesn't affect the memory address being promoted.

llvm-svn: 122172

does not make the alias set for that pointer volatile, just stores
*to* the pointer.

llvm-svn: 122171

isel is *required* to split the edge.  PHI values get evaluated
on the edge, not in their predecessor block.

llvm-svn: 122170

llvm-svn: 122168

llvm-svn: 122167

llvm-svn: 122165

which have trapping constant exprs in them due to PHI nodes.
Eliminating them can cause the constant expr to be evalutated
on new paths if the input edges are critical.

llvm-svn: 122164

llvm-svn: 122160

llvm-svn: 122158

llvm-svn: 122157

llvm-svn: 122156

It turns out that ppc backend has really weird interdependencies
over different hooks and all stuff is fragile wrt small changes.
This should fix PR8749

llvm-svn: 122155

This fixed 8615.

llvm-svn: 122150

the buildbots.

llvm-svn: 122149

llvm-svn: 122148

llvm-svn: 122147

llvm-svn: 122144

llvm-svn: 122142

llvm-svn: 122141

llvm-svn: 122139

I added a note, but suggestions on how to add a test are really welcome.

llvm-svn: 122138

llvm-svn: 122135

llvm-svn: 122134

use before rematerializing the load.

This allows us to produce:

    addps	LCPI0_1(%rip), %xmm2

Instead of:

    movaps	LCPI0_1(%rip), %xmm3
    addps	%xmm3, %xmm2

Saving a register and an instruction. The standard spiller already knows how to
do this.

llvm-svn: 122133

llvm-svn: 122132

ARM::tMOVgpr2gpr. But this check didn't change. As a result, we were getting
misaligned references to the jump table from an ADR instruction.

There is a test case, but unfortunately it's sensitive to random code changes.

<rdar://problem/8782223>

llvm-svn: 122131

llvm-svn: 122129

the loop predecessors.

The register can be live-out from a predecessor without being live-in to the
loop header if there is a critical edge from the predecessor.

llvm-svn: 122123

  lib/CodeGen/RegAllocGreedy.cpp:311: error: unused variable 'PhysReg' [-Wunused-variable]

llvm-svn: 122122

llvm-svn: 122121

llvm-svn: 122120

llvm-svn: 122119

llvm-svn: 122116

llvm-svn: 122114

createMachineVerifierPass and MachineFunction::verify.

The banner is printed before the machine code dump, just like the printer pass.

llvm-svn: 122113

The result vector elements are always integers.  Radar 8782191.

llvm-svn: 122112

llvm-svn: 122111