llvm-svn: 73847

llvm-svn: 73845

llvm-svn: 73844

llvm-svn: 73843

llvm-svn: 73842

llvm-svn: 73798

llvm-svn: 73602

llvm-svn: 73331

computation that isn't used. Please correct this if it's wrong!

llvm-svn: 73139

Revert 73074 and 73099 because Windows doesn't have POSIX
regular expressions.  We will add an OpenBSD implementation
and re-apply ASAP.

llvm-svn: 73138

Add a !patsubst operator.  Use on string types.

llvm-svn: 73099

Make IntInits and ListInits typed.  This helps deduce types of !if and
other operators.  For the rare cases where a list type cannot be
deduced, provide a []<type> syntax, where <type> is the list element
type.

llvm-svn: 73078

Make !if short-circuit when possible.

llvm-svn: 73076

Add a !regmatch operator to do pattern matching in TableGen.

llvm-svn: 73074

llvm-svn: 72712

ADDC/ADDE use MVT::i1 (later, whatever it gets legalized to)
instead of MVT::Flag.  Remove CARRY_FALSE in favor of 0; adjust
all target-independent code to use this format.

Most targets will still produce a Flag-setting target-dependent
version when selection is done.  X86 is converted to use i32
instead, which means TableGen needs to produce different code
in xxxGenDAGISel.inc.  This keys off the new supportsHasI1 bit
in xxxInstrInfo, currently set only for X86; in principle this
is temporary and should go away when all other targets have
been converted.  All relevant X86 instruction patterns are
modified to represent setting and using EFLAGS explicitly.  The
same can be done on other targets.

The immediate behavior change is that an ADC/ADD pair are no
longer tightly coupled in the X86 scheduler; they can be
separated by instructions that don't clobber the flags (MOV).
I will soon add some peephole optimizations based on using
other instructions that set the flags to feed into ADC.

llvm-svn: 72707

llvm-svn: 72335

files for PIC16 target.

llvm-svn: 72277

operand is the last in a pattern.  There is no
reason this should be true (although apparently
it always is right now).

llvm-svn: 72232

llvm-svn: 71834

Also fix up some 80col violations while I'm there.

llvm-svn: 71833

Implement !if, analogous to $(if) in GNU make.

llvm-svn: 71815

Graduate LLVM to the big leagues by embedding a LISP processor into TableGen.

Ok, not really, but do support some common LISP functions:

* car
* cdr
* null

llvm-svn: 71805

Implement a !foreach operator analogous to GNU make's $(foreach).
Use it on dags and lists like this:

class decls {
  string name;
}

def Decls : decls;

class B<list<string> names> : A<!foreach(Decls.name, names, !strconcat(Decls.name, ", Sr."))>;

llvm-svn: 71803

Implement a !subst operation simmilar to $(subst) in GNU make to do
def/var/string substitution on generic pattern templates.  For example:

def Type;
def v4f32 : Type;
def TYPE : Type;

class GenType<Type t> {
  let type = !(subst TYPE, v4f32, t);
}

def TheType : GenType<TYPE>;

llvm-svn: 71801

Implement !cast.

llvm-svn: 71794

Operation Enhancements

Create an OpInit class to serve as a base for all operation Inits.

Move parsing of operation constructs to separate functions and reference
from multiple places.

Add some commented out new operations.  Coming soon.

llvm-svn: 71789

Fix PR4207.

If we're resolving a list element access and we're given a VarInit,
return a new VarListElementInit referencing the VarInit.

llvm-svn: 71787

Should remove a warning from MSVC.

llvm-svn: 71603

will make it more obvious what it represents, and stop
it being confused with the StoreSize.

llvm-svn: 71349

patch by Mikael Lepistö!

llvm-svn: 71226

No functionality change.

llvm-svn: 71156

llvm-svn: 71068

See PR4159 for details. Patch by Martin Nowack!

llvm-svn: 71054

Allow multiclass def names to contain "#NAME"" where TableGen replaces
#NAME# with the name of the defm instantiating the multiclass.  This is
useful for AVX instruction naming where a "V" prefix is standard
throughout the ISA.  For example:

multiclass SSE_AVX_Inst<...> {
   def SS : Instr<...>;
   def SD : Instr<...>;
   def PS : Instr<...>;
   def PD : Instr<...>;

   def V#NAME#SS : Instr<...>;
   def V#NAME#SD : Instr<...>;
   def V#NAME#PS : Instr<...>;
   def V#NAME#PD : Instr<...>;
}

defm ADD : SSE_AVX_Inst<...>;

Results in 

ADDSS
ADDSD
ADDPS
ADDPD

VADDSS
VADDSD
VADDPS
VADDPD

llvm-svn: 70979

See PR4157 for details. Patch by Martin Nowack!

llvm-svn: 70973

llvm-svn: 70879

-Depend on DebugLocs for source line info.

(Comes with Regression-Be-Gone(tm))

llvm-svn: 70871

llvm-svn: 70811

-Depend on DebugLocs for source line info.

llvm-svn: 70803