llvm-svn: 138664

llvm-svn: 138660

split it in the other place where we're splitting critical edges.

llvm-svn: 138658

llvm-svn: 138657

llvm-svn: 138656

llvm-svn: 138654

invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons.  We were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts.  Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits.  This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure.

llvm-svn: 138653

I'll clean up the rest of the XFAIL: vg_leak lines if this works.

llvm-svn: 138652

llvm-svn: 138651

llvm-svn: 138647

llvm-svn: 138642

llvm-svn: 138640

This should fix PR10772.

llvm-svn: 138636

Support an extension of ARM asm syntax to allow immediate operands to ADR instructions.  This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here.

llvm-svn: 138635

llvm-svn: 138634

llvm-svn: 138630

llvm-svn: 138626

Fix PR10755 by checking for invalid predicate codes from UNPREDICTABLE t2IT instructions when decoding their successors.
This is the last disassembly crash detected by exhaustive Thumb2 instruction space.  Major thanks to Chandler Carruth for making this kind of exhaustive testing possible.

llvm-svn: 138625

llvm-svn: 138623

Fixes an oversight, and adds verification to catch it in the unloop.ll tests.

llvm-svn: 138622

I don't really like the patterns, but I'm having trouble coming up with a
better way to handle them.

I plan on making other targets use the same legalization
ARM-without-memory-barriers is using... it's not especially efficient, but
if anyone cares, it's not that hard to fix for a given target if there's
some better lowering.

llvm-svn: 138621

- Reword comments.
- Allow undefined behavior interfering with undefined behavior.
- Add address space checks.

llvm-svn: 138619

SimplifyCFG: If we have a PHI node that can evaluate to NULL and do a load or store to the address returned by the PHI node then we can consider this incoming value as dead and remove the edge pointing there, unless there are instructions that can affect control flow executed in between.

In theory this could be extended to other instructions, eg. division by zero, but it's likely that it will "miscompile" some code because people depend on div by zero not trapping. NULL pointer dereference usually leads to a crash so we should be on the safe side.

This shrinks the size of a Release clang by 16k on x86_64.

llvm-svn: 138618

llvm-svn: 138606

scheme, return 'true' so that it doesn't try to run the old EH scheme's fixup on
the new code.

llvm-svn: 138605

This upgrade suffers from the problems of the old EH scheme - i.e., that the
calls to llvm.eh.exception() and llvm.eh.selector() can wander off and get
lost. It makes a valiant effort to reclaim these little lost lambs.

This is a first draft, so it hasn't yet been hooked up to the parser.

llvm-svn: 138602

llvm-svn: 138592

llvm-svn: 138589

llvm-svn: 138588

llvm-svn: 138587

Make ConstantInt::uge() const so it may be used in const contexts.

llvm-svn: 138579

Port over additional encoding tests to decoding tests, and fix an operand ordering bug this exposed.

llvm-svn: 138575

llvm-svn: 138573

rdar://10005094: miscompile of 176.gcc

llvm-svn: 138568

llvm-svn: 138566

llvm-svn: 138562

Add more missing TB encodings to VEX instructions to allow them to be disassembled. Fixes remainder of PR10678.

llvm-svn: 138553

Give ATTR_VEX higher priority when generating the disassembler context table. Fixes disassembling of VEX instructions with 'pp'=00. Fixes subset of PR10678.

llvm-svn: 138552

Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them to be disassembled. Fixes PR10723.

llvm-svn: 138551

proper function to do it.

llvm-svn: 138550