This will always be false before PEI:
(DisableFramePointerElim(MF) && MFI->adjustsStack())
Which means it's going to make r11 available as a general purpose register even
if -disable-fp-elim is specified. It's working on Darwin only because r7 is
always reserved. But it's obviously broken for other targets.

llvm-svn: 110614

Add VCVTPD2PS, VCVTPS2DQ, VCVTPS2PDY, VCVTTPD2DQY, VCVTTPS2DQ and VCVTPD2DQ 256-bit conversion intrinsics

llvm-svn: 110608

Add patterns to AVX conversions instructions. Do that instead of declaring more intructions whenever is possible, more coming

llvm-svn: 110605

Next time the build is broken due to wrong library dependencies, just
try building again (if you are on some Unix and are building all LLVM
targets) or ask someone to commit the regenerated LLVMLibDeps.cmake.

llvm-svn: 110593

llvm-svn: 110587

Change -prefer-32bit-thumb to attribute -mattr=+32bit instead to disable more 32-bit to 16-bit optimizations.

llvm-svn: 110584

llvm-svn: 110582

llvm-svn: 110580

llvm-svn: 110579

llvm-svn: 110576

llvm-svn: 110543

relatively expensive comparison analyzer on each instruction. Also rename the
comparison analyzer method to something more in line with what it actually does.

This pass is will eventually be folded into the Machine CSE pass.

llvm-svn: 110539

form of CMPSD (etc.)  Matching a 128-bit memory
operand is wrong, the instruction uses only 64 bits
(same as ADDSD etc.)  8193553.

llvm-svn: 110491

llvm-svn: 110480

llvm-svn: 110468

implementation of the function is equivalent, so no need to provide
the target-specific version until/unless it needs to do something.

llvm-svn: 110465

llvm-svn: 110460

Without this what was happening was:

* R3 is not marked as "used"
* ARM backend thinks it has to save it to the stack because of vaarg
* Offset computation correctly ignores it
* Offsets are wrong

llvm-svn: 110446

llvm-svn: 110427

llvm-svn: 110425

This pass tries to remove comparison instructions when possible. For instance,
if you have this code:

   sub r1, 1
   cmp r1, 0
   bz  L1

and "sub" either sets the same flag as the "cmp" instruction or could be
converted to set the same flag, then we can eliminate the "cmp" instruction all
together. This is a important for ARM where the ALU instructions could set the
CPSR flag, but need a special suffix ('s') to do so.

llvm-svn: 110423

llvm-svn: 110410

llvm-svn: 110404

ID member as the sole unique type identifier.  Clean up APIs related to this change.

llvm-svn: 110396

to IntrReadWriteArgMem, as it's for reading as well as writing.

llvm-svn: 110395

Support very basic (doesn't include ABI support in the front-end, varags, ...) 256-bit argument passing and return for AVX

llvm-svn: 110394

llvm-svn: 110371

llvm-svn: 110369

register for local access when it's closer to the stack slot being refererenced
than the stack pointer. Make sure to take into account any argument frame
SP adjustments that are in affect at the time.

rdar://8256090

llvm-svn: 110366

llvm-svn: 110363

Partial fix for PR7792.

llvm-svn: 110361

instructions.

llvm-svn: 110360

llvm-svn: 110359

Partial fix for PR7792.

llvm-svn: 110358

preserves the existing behavior, as it seems a concious choice to allow RS to
be null and BigStack marked true.

llvm-svn: 110307

llvm-svn: 110292

uses.

llvm-svn: 110274

llvm-svn: 110269

llvm-svn: 110268

llvm-svn: 110267