- Sep 09, 2010
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Evan Cheng authored
llvm-svn: 113435
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- Sep 08, 2010
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Eric Christopher authored
llvm-svn: 113417
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Jim Grosbach authored
Re-running some nightly testers w/ it enabled to verify. llvm-svn: 113399
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Jim Grosbach authored
pointer was intended. rdar://8401980 llvm-svn: 113394
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Eric Christopher authored
llvm-svn: 113387
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Jim Grosbach authored
option to disable base pointer usage, pay attention to it when deciding if we can realign (if no base pointer and VLAs, we can't). llvm-svn: 113366
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Jim Grosbach authored
llvm-svn: 113365
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Chris Lattner authored
implementation's job to check for and lex the EndOfStatement marker. llvm-svn: 113347
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NAKAMURA Takumi authored
ARM/Disassembler: Fix definitions incompatible(unsigned and uint32_t) to Cygwin-1.5, following up to r113255. llvm-svn: 113345
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Jim Grosbach authored
llvm-svn: 113338
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Jim Grosbach authored
llvm-svn: 113337
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Jim Grosbach authored
related. (attempt deux, complete w/ test update this time) llvm-svn: 113333
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Jim Grosbach authored
llvm-svn: 113332
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Jim Grosbach authored
llvm-svn: 113331
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Jim Grosbach authored
present in the function and thus whether aligned load/store instructions can be used. llvm-svn: 113323
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Jim Grosbach authored
llvm-svn: 113322
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Jim Grosbach authored
register must be one of the destination registers for the load. Otherwise, the tLDM instruction will write-back to the base register, which isn't what's desired (otherwise, we'd have a t2LDM_UPD instead). rdar://8394087 llvm-svn: 113297
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- Sep 07, 2010
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Jim Grosbach authored
llvm-svn: 113289
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Chris Lattner authored
llvm-svn: 113255
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Chris Lattner authored
of a mneumonic, report operand errors with better location info. For example, we now report: t.s:6:14: error: invalid operand for instruction cwtl $1 ^ but we fail for common cases like: t.s:11:4: error: invalid operand for instruction addl $1, $1 ^ because we don't know if this is supposed to be the reg/imm or imm/reg form. llvm-svn: 113178
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- Sep 06, 2010
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Chris Lattner authored
llvm-svn: 113165
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Chris Lattner authored
into the middle of the class, and rework how the different sections of the generated file are conditionally included for simplicity. llvm-svn: 113163
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Chris Lattner authored
pattern, so there is no need to define a matching function. llvm-svn: 113122
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- Sep 05, 2010
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Chris Lattner authored
llvm-svn: 113119
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- Sep 04, 2010
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Chris Lattner authored
llvm-svn: 113073
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- Sep 03, 2010
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Jim Grosbach authored
"For ARM stack frames that utilize variable sized objects and have either large local stack areas or require dynamic stack realignment, allocate a base register via which to access the local frame. This allows efficient access to frame indices not accessible via the FP (either due to being out of range or due to dynamic realignment) or the SP (due to variable sized object allocation). In particular, this greatly improves efficiency of access to spill slots in Thumb functions which contain VLAs." r112986 fixed a latent bug exposed by the above. llvm-svn: 112989
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Jim Grosbach authored
alignment should be performed. Otherwise dynamic realignment may trigger when the register allocator has already used the frame pointer as a general purpose register. That is, we need to make sure that the list of reserved registers doesn't change after register allocation. llvm-svn: 112986
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Bob Wilson authored
instructions prior to regalloc. Since it's getting a little close to the 2.8 branch deadline, I'll have to leave the rest of the instructions handled by the NEONPreAllocPass for now, but I didn't want to leave half of the VLD instructions converted and the other half not. llvm-svn: 112983
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Daniel Dunbar authored
Revert "For ARM stack frames that utilize variable sized objects and have either", it is breaking oggenc with Clang for ARMv6. This reverts commit 8d6e29cfda270be483abf638850311670829ee65. llvm-svn: 112962
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Bob Wilson authored
vabd intrinsic and add and/or zext operations. In the case of vaba, this also avoids the need for a DAG combine pattern to combine vabd with add. Update tests. Auto-upgrade the old intrinsics. llvm-svn: 112941
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Eric Christopher authored
llvm-svn: 112923
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Eric Christopher authored
stores. llvm-svn: 112912
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Jim Grosbach authored
large local stack areas or require dynamic stack realignment, allocate a base register via which to access the local frame. This allows efficient access to frame indices not accessible via the FP (either due to being out of range or due to dynamic realignment) or the SP (due to variable sized object allocation). In particular, this greatly improves efficiency of access to spill slots in Thumb functions which contain VLAs. rdar://7352504 rdar://8374540 rdar://8355680 llvm-svn: 112883
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- Sep 02, 2010
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Jim Grosbach authored
llvm-svn: 112852
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Jim Grosbach authored
ARM register class allocation order functions to take advantage of that. llvm-svn: 112841
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Bob Wilson authored
llvm-svn: 112826
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Bob Wilson authored
after regalloc. llvm-svn: 112825
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Eric Christopher authored
I don't need to implement this quite yet - and not for ConstantInt anyhow. llvm-svn: 112798
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Eric Christopher authored
llvm-svn: 112795
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Eric Christopher authored
llvm-svn: 112793
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