Commits · 72d4d32cd629b41616e389ed8301a3086c6d01c1 · Roger Ferrer / llvm-epi-0.8

Dec 06, 2011
- Expose a switch for the new gcov format. · 72d4d32c
  Nick Lewycky authored Dec 06, 2011
```
llvm-svn: 145880
```
  72d4d32c
- Probably not a good idea to convert a single vector load into a memcpy. We · 8abf65a1
  Chad Rosier authored Dec 06, 2011
```
don't do this now, but add a test case to prevent this from happening in the
future.
Additional test for rdar://9892684

llvm-svn: 145879
```
  8abf65a1
- Tidy up. Hard tabs. · 46be301c
  Jim Grosbach authored Dec 06, 2011
```
llvm-svn: 145878
```
  46be301c
- Tidy up. Hard tabs. · 02a75ceb
  Jim Grosbach authored Dec 06, 2011
```
llvm-svn: 145877
```
  02a75ceb
- All these arguments are default anyways. · cff88d3e
  Nick Lewycky authored Dec 06, 2011
```
llvm-svn: 145876
```
  cff88d3e
- Tidy up. 80 columns. · 0c31f1c6
  Jim Grosbach authored Dec 06, 2011
```
llvm-svn: 145875
```
  0c31f1c6
- Switch MCAssembler to method names starting w/ lower-case. · 18e2fe47
  Jim Grosbach authored Dec 06, 2011
```
per http://llvm.org/docs/CodingStandards.html#ll_naming

llvm-svn: 145873
```
  18e2fe47
- Simple branch relaxation for Thumb2 Bcc instructions. · 34a7c6df
  Jim Grosbach authored Dec 05, 2011
```
Not right yet, as the rules for when to relax in the MCAssembler aren't
(yet) correct for ARM. This is a step in the proper direction, though.

llvm-svn: 145871
```
  34a7c6df
- Tidy up. · 78309c47
  Jim Grosbach authored Dec 05, 2011
```
llvm-svn: 145870
```
  78309c47
- Silence tsan false-positives (tsan can't track things which are only safe due to · 897a57ec
  Nick Lewycky authored Dec 05, 2011
```
memory fences) in statistics registration, which works the same way that
ManagedStatic registration does.

llvm-svn: 145869
```
  897a57ec
Dec 05, 2011
- Update comment. · 32775577
  Chad Rosier authored Dec 05, 2011
```
llvm-svn: 145866
```
  32775577
- Make the MemCpyOptimizer a bit more aggressive. I can't think of a scenerio · 19446a07
  Chad Rosier authored Dec 05, 2011
```
where this would be bad as the backend shouldn't have a problem inlining small
memcpys.
rdar://10510150

llvm-svn: 145865
```
  19446a07
- Tweak ADDrr fix. Bad check for explicit .w · b8c719cc
  Jim Grosbach authored Dec 05, 2011
```
llvm-svn: 145863
```
  b8c719cc
- Update tests for r145860. Add a few new ones. · 8b5e9257
  Jim Grosbach authored Dec 05, 2011
```
llvm-svn: 145861
```
  8b5e9257
- Thumb2 prefer ADD register encoding T2 to T3 when possible. · e489babf
  Jim Grosbach authored Dec 05, 2011
```
rdar://10529664

llvm-svn: 145860
```
  e489babf
- Move 'returns_twice' definition into alphabetical place. · b437ab85
  Bill Wendling authored Dec 05, 2011
```
llvm-svn: 145854
```
  b437ab85
- Add definitions of 64-bit extract and insert instrucions and make · 20cee2eb
  Akira Hatanaka authored Dec 05, 2011
```
PerformANDCombine and PerformOrCombine aware of them. Test cases are included
too.

llvm-svn: 145853
```
  20cee2eb
- Split ExtIns into two base classes and have instructions EXT and INS derive from · 9b8ac674
  Akira Hatanaka authored Dec 05, 2011
```
them.

llvm-svn: 145852
```
  9b8ac674
- Thumb2 prefer encoding T3 to T4 for ADD/SUB immediate instructions. · ec9ba982
  Jim Grosbach authored Dec 05, 2011
```
rdar://10529348

llvm-svn: 145851
```
  ec9ba982
- Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 and · 34e3df76
  Akira Hatanaka authored Dec 05, 2011
```
O32 with relocation-model=pic too.

llvm-svn: 145850
```
  34e3df76
- ARM assembly parsing for the rest of the VMUL data type aliases. · fdf9e158
  Jim Grosbach authored Dec 05, 2011
```
Finish up rdar://10522016.

llvm-svn: 145846
```
  fdf9e158
- Fix previous commit. Oops. · 9e90c5cd
  Jim Grosbach authored Dec 05, 2011
```
llvm-svn: 145844
```
  9e90c5cd
- Tidy up. No functional change. · 2b37e4fc
  Jim Grosbach authored Dec 05, 2011
```
llvm-svn: 145843
```
  2b37e4fc
- ARM assmebler parsing for two-operand VMUL instructions. · 0a978ef7
  Jim Grosbach authored Dec 05, 2011
```
Combined destination and first source operand for f32 variant of the VMUL
(by scalar) instruction.

rdar://10522016

llvm-svn: 145842
```
  0a978ef7
- Change the Dominators recalculate() function to only rely on GraphTraits · e9504a26
  Anna Zaks authored Dec 05, 2011
```
This is a patch by Guoping Long!

As part of utilizing LLVM Dominator computation in Clang, made two changes to LLVM dominators tree implementation:

 - (1) Change the recalculate() template function to only rely on GraphTraits.
 - (2) Add a size() method to GraphTraits template class to query the number of nodes in the graph.

llvm-svn: 145837
```
  e9504a26
- Add test case - this input used to crash because of duplicate generation of SPILL_CRs · 97a6028b
  Hal Finkel authored Dec 05, 2011
```
llvm-svn: 145820
```
  97a6028b
- enable PPC register scavenging by default (update tests and remove some FIXMEs) · 8f6834df
  Hal Finkel authored Dec 05, 2011
```
llvm-svn: 145819
```
  8f6834df
- don't include CR bit subregs in callee-saved list · 72a26e8b
  Hal Finkel authored Dec 05, 2011
```
llvm-svn: 145818
```
  72a26e8b
- remove wasted space for extra bit copies of CR2 subregs · e18c7268
  Hal Finkel authored Dec 05, 2011
```
llvm-svn: 145817
```
  e18c7268
- add register pressure for CR regs · b544019a
  Hal Finkel authored Dec 05, 2011
```
llvm-svn: 145816
```
  b544019a
- Add a little heuristic to Value::isUsedInBasicBlock to speed it up for small basic blocks. · 13231037
  Benjamin Kramer authored Dec 05, 2011
```
- Calling getUser in a loop is much more expensive than iterating over a few instructions.
- Use it instead of the open-coded loop in AddrModeMatcher.
- 5% speedup on ARMDisassembler.cpp Release builds.

llvm-svn: 145810
```
  13231037
- test/CodeGen/X86/pointer-vector.ll: Add explicit -mtriple=i686-linux. · e6efe405
  NAKAMURA Takumi authored Dec 05, 2011
```
llvm-svn: 145805
```
  e6efe405
- Remove some leftover remnants that once tried to create 64-bit MMX PALIGNR instructions. · 51bec1a3
  Craig Topper authored Dec 05, 2011
```
llvm-svn: 145804
```
  51bec1a3
- Clean up and optimizations to the X86 shuffle lowering code. No functional change. · 6a55b1dd
  Craig Topper authored Dec 05, 2011
```
llvm-svn: 145803
```
  6a55b1dd
- · 3924cb02
  Nadav Rotem authored Dec 05, 2011
```
Add support for vectors of pointers.

llvm-svn: 145801
```
  3924cb02
Dec 04, 2011
- Fix table of contents. · 5fd147f9
  Jakub Staszak authored Dec 04, 2011
```
llvm-svn: 145793
```
  5fd147f9
- Add 'llvm.expect' intrinsic description. · 5fef792d
  Jakub Staszak authored Dec 04, 2011
```
llvm-svn: 145792
```
  5fef792d
- Add inline subprogram names to the name lookup table since they may · 8dda5d0f
  Eric Christopher authored Dec 04, 2011
```
not get there any other way.

llvm-svn: 145789
```
  8dda5d0f
- Fix 80-column issues. · 80381f6c
  Bob Wilson authored Dec 04, 2011
```
llvm-svn: 145783
```
  80381f6c
- Emit the ctors in the proper order on ARM/EABI. · 965e0c6d
  Anton Korobeynikov authored Dec 03, 2011
```
Maybe some targets should use this as well.

Patch by Evgeniy Stepanov!

llvm-svn: 145781
```
  965e0c6d