- Feb 15, 2012
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Bill Wendling authored
method. This allows the target lowering code to not have to deal with MDNodes. Also, avoid leaking memory like a sieve by not creating a global variable for the image info section, but just emitting the code directly. llvm-svn: 150624
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Bill Wendling authored
llvm-svn: 150623
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Kaelyn Uhrain authored
Accomplished by moving the body of StringRef::edit_distance into a separate function that accepts two ArrayRefs, and making StringRef::edit_distance a wrapper around the new function. llvm-svn: 150621
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Andrew Trick authored
llvm-svn: 150619
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Daniel Dunbar authored
llvm-svn: 150610
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Lang Hames authored
llvm-svn: 150608
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Andrew Trick authored
Patch by Sundeep! llvm-svn: 150607
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Sirish Pande authored
llvm-svn: 150606
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Eric Christopher authored
This reverts commit 1656806a944bbd23e98c6e578810fe02495ab741. llvm-svn: 150605
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Eric Christopher authored
as it's breaking the build. This reverts commit 11241abca5e2a313412fed594bb9d9fa2a2057fb. llvm-svn: 150604
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Sirish Pande authored
llvm-svn: 150603
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Sirish Pande authored
llvm-svn: 150601
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Chad Rosier authored
llvm-svn: 150591
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David Meyer authored
For ELF, also call fixSymbolsInTLSFixups() on expressions passed to EmitValue (literal values). Previously only called on expressions in instructions. New test cases added to tls.s, tls-i386.s. Resolves PR11981. llvm-svn: 150582
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Bill Wendling authored
The c'tor list is stored as a list of 'void ()*'s, so all of the functions are bitcast to that. However, the dyn_cast doesn't automagically look through bitcasts. Do that for it. <rdar://problem/10813350> llvm-svn: 150572
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Eric Christopher authored
used to incrementally update a created node without needing a temporary node and RAUW. llvm-svn: 150571
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Andrew Trick authored
I'll put MachineLICM back before PEI. All my arm/x86 benchmarks look good, but buildbots don't like it. llvm-svn: 150568
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Andrew Trick authored
llvm-svn: 150567
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Andrew Trick authored
llvm-svn: 150566
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Andrew Trick authored
llvm-svn: 150565
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Lang Hames authored
llvm-svn: 150564
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Andrew Trick authored
The llc command line options for enabling/disabling passes are local to CodeGen/Passes.cpp. This patch associates those options with standard pass IDs so they work regardless of how the target configures the passes. A target has two ways of overriding standard passes: 1) Redefine the pass pipeline (override TargetPassConfig::add%Stage) 2) Replace or suppress individiual passes with TargetPassConfig::substitutePass. In both cases, the command line options associated with the pass override the target default. For example, say a target wants to disable machine instruction scheduling by default: - The target calls disablePass(MachineSchedulerID) but otherwise does not override any TargetPassConfig methods. - Without any llc options, no scheduler is run. - With -enable-misched, the standard machine scheduler is run and honors the -misched=... flag to select the scheduler variant, which may be used for performance evaluation or testing. Sorry overridePass is ugly. I haven't thought of a better way without replacing the cl::opt framework. I hope to do that one day... I haven't figured out why CodeGen uses char& for pass IDs. AnalysisID is much easier to use and less bug prone. I'm using it wherever I can for internal implementation. Maybe later we can change the global pass ID definitions as well. llvm-svn: 150563
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Andrew Trick authored
Added TargetPassConfig::disablePass/substitutePass as a general mechanism to override specific passes. llvm-svn: 150562
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Andrew Trick authored
llvm-svn: 150561
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Lang Hames authored
llvm-svn: 150553
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Lang Hames authored
llvm-svn: 150552
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Pete Cooper authored
llvm-svn: 150550
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Chad Rosier authored
llvm-svn: 150538
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Pete Cooper authored
Stop custom lowering forr x86 DEC64m from happening if the load in the lowered sequence has more than 1 user llvm-svn: 150537
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Chad Rosier authored
llvm-svn: 150536
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Jakob Stoklund Olesen authored
Pretend that regmask interference ends at the 'dead' slot, even when there is other interference ending at the 'reg' slot of the same instruction. llvm-svn: 150531
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Jakob Stoklund Olesen authored
Perform all comparisons at instruction granularity, and make sure register masks on uses count in both gaps. llvm-svn: 150530
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Jakob Stoklund Olesen authored
Only accept register masks when looking for an 'overlapping' def. When Overlap is not set, the function searches for a proper definition of Reg. This means MI->modifiesRegister() considers register masks, but MI->definesRegister() doesn't. llvm-svn: 150529
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Jakob Stoklund Olesen authored
When a physreg is live in to a basic block, look for any instruction in the block that clobbers the physreg. The instruction doesn't have to properly redefine the register, any overlapping clobber is OK. This slightly changes live ranges when compiling with register masks. llvm-svn: 150528
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Jakob Stoklund Olesen authored
The old DenseMap hashed order was very confusing. llvm-svn: 150527
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Lang Hames authored
llvm-svn: 150525
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- Feb 14, 2012
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Chad Rosier authored
llvm-svn: 150520
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Dmitri Gribenko authored
after the `for(...) ;' has more indentation than for itself. llvm-svn: 150516
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Aaron Ballman authored
Using the new external-linkage warning recently added instead of disabling all return type warnings. llvm-svn: 150512
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Aaron Ballman authored
Patch by Matt Johnson llvm-svn: 150508
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