llvm-svn: 94350

movw	$8, (_cost_table_-L97$pb)+66(%eax)

After the parens, we could still have a binop.

llvm-svn: 94345

Add support to widen SETCC.

llvm-svn: 94342

"sext cond" instead of a select.  This simplifies some instcombine
code, matches the policy for zext (cond ? 1 : 0 -> zext), and allows
us to generate better code for a testcase on ppc.

llvm-svn: 94339

the alignment allows.  Fixed a bug where we didn't use a
vector load/store for PR5626.

llvm-svn: 94338

llvm-svn: 94336

llvm-svn: 94331

for arbitrary terminators in predecessors, don't assume
it is a conditional or uncond branch.  The testcase shows
an example where they can happen with switches.

llvm-svn: 94323

externally visible function, it can still find all callers of it and replace
the parameters to a dead argument with undef.

llvm-svn: 94322

handle the case when we can infer an input to the xor
from all inputs that agree, instead of going into an
infinite loop.  Another part of PR6199

llvm-svn: 94321

llvm-svn: 94319

readme forever.

llvm-svn: 94318

llvm-svn: 94317

llvm-svn: 94312

the '-pre-RA-sched' flag. It actually makes more sense to do it this way. Also,
keep track of the SDNode ordering by default. Eventually, we would like to make
this ordering a way to break a "tie" in the scheduler. However, doing that now
breaks the "CodeGen/X86/abi-isel.ll" test for 32-bit Linux.

llvm-svn: 94308

llvm-svn: 94304

llvm-svn: 94299

a .section.  Switch to it with SwitchSection.

However, I think that this directive should be safe on any ELF target.
If so, we should hoist it up out of the X86 and SystemZ targets.

llvm-svn: 94298

llvm-svn: 94297

llvm-svn: 94296

llvm-svn: 94295

into a new MCDirectives.h file.

llvm-svn: 94294

to MCExpr then emit them through MCStreamer with EmitValue.  I think all
global variable initializers are now going through mcstreamer.

llvm-svn: 94293

stack may be misaligned.

Update test accordingly.

Patch by Evan Cheng!

llvm-svn: 94291

llvm-svn: 94290

for strcpy.

llvm-svn: 94287

llvm-svn: 94286

llvm-svn: 94285

and some .weak directives.

llvm-svn: 94284

llvm-svn: 94282

llvm-svn: 94281

llvm-svn: 94280

llvm-svn: 94278

be careful to add a \0 at the end though, because EmitString didn't
do this.

llvm-svn: 94277

target-specific AsmLexer, and added the appropriate
registration calls.

llvm-svn: 94275

be static.  Also made it possible for clients to get it
and no other functions from ...GenAsmMatcher.inc by
defining REGISTERS_ONLY before including GenAsmMatcher.inc.
This sets the stage for target-specific lexers that can
identify registers and return AsmToken::Register as
appropriate.

llvm-svn: 94266

llvm-svn: 94262

In mem2reg, for all alloca/stores that get promoted where the alloca has an associated llvm.dbg.declare instrinsic, insert an llvm.dbg.var intrinsic before each store

llvm-svn: 94260

llvm-svn: 94259

llvm-svn: 94256