Cygwin).

llvm-svn: 19255

llvm-svn: 19254

llvm-svn: 19253

to get Visual Studio to link in X86.lib to the executables that need it.  There
is another way of doing it.

llvm-svn: 19252

addition to being three address, LEA's don't set the flags.

This fixes 186.crafty.

llvm-svn: 19251

llvm-svn: 19250

llvm-svn: 19249

llvm-svn: 19248

branches.

llvm-svn: 19247

1. Add new instructions for checking parity flags: JP, JNP, SETP, SETNP.
2. Set the isCommutable and isPromotableTo3Address bits on several
   instructions.

llvm-svn: 19246

1. If we are two-addressing a commutable instruction and the LHS is not the
   last use of the variable, see if the instruction is the last use of the
   RHS.  If so, commute the instruction, allowing us to avoid a
   register-register copy in many cases for common instructions like ADD, OR,
   AND, etc on X86.
2. If #1 doesn't hold, and if this is an instruction that also existing in
   3-address form, promote the instruction to a 3-address instruction to
   avoid the register-register copy.  We can do this for several common
   instructions in X86, including ADDrr, INC, DEC, etc.

This patch implements test/Regression/CodeGen/X86/commute-two-addr.ll,
overlap-add.ll, and overlap-shift.ll when I check in the X86 support for it.

llvm-svn: 19245

llvm-svn: 19244

llvm-svn: 19243

they are dense.  Add a virtual method that targets can choose to implement.

llvm-svn: 19242

llvm-svn: 19241

llvm-svn: 19240

This prevents bytecode splats with usage like: cat file.ll | llvm-as -

llvm-svn: 19239

into lib/Support so it can be used with other tools.

llvm-svn: 19238

a terminal/console.

llvm-svn: 19237

console or not.

llvm-svn: 19236

llvm-svn: 19235

llvm-svn: 19234

console or not.

llvm-svn: 19233

llvm-svn: 19232

llvm-svn: 19231

llvm-svn: 19230

llvm-svn: 19229

llvm-svn: 19228

llvm-svn: 19227

llvm-svn: 19226

llvm-svn: 19225

llvm-svn: 19224

Move TableGen generated files out of the src tree
Add descriptions to the custom build steps

llvm-svn: 19223

llvm-svn: 19222

llvm-svn: 19221

  * We can now fold cast instructions into select instructions that
    have at least one constant operand.
  * We now optimize expressions more aggressively based on bits that are
    known to be zero.  These optimizations occur a lot in code that uses
    bitfields even in simple ways.
  * We now turn more cast-cast sequences into AND instructions.  Before we
    would only do this if it if all types were unsigned.  Now only the
    middle type needs to be unsigned (guaranteeing a zero extend).
  * We transform sign extensions into zero extensions in several cases.

This corresponds to these test/Regression/Transforms/InstCombine testcases:
  2004-11-22-Missed-and-fold.ll
  and.ll: test28-29
  cast.ll: test21-24
  and-or-and.ll
  cast-cast-to-and.ll
  zeroext-and-reduce.ll

llvm-svn: 19220

llvm-svn: 19219

llvm-svn: 19218

llvm-svn: 19217

llvm-svn: 19216