llvm-svn: 78632

arguments that are vectors of any size and element type.

llvm-svn: 78631

INT i8.  These instructions are only for interpretation by disassemblers, not
for emission, so they do not as yet have patterns.

llvm-svn: 78630

llvm-svn: 78629

llvm-svn: 78627

and short. Well, it's kinda short. Definitely nasty and brutish.

The front-end generates the register/unregister calls into the SjLj runtime,
call-site indices and landing pad dispatch. The back end fills in the LSDA
with the call-site information provided by the front end. Catch blocks are
not yet implemented.

Built on Darwin and verified no llvm-core "make check" regressions.

llvm-svn: 78625

Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch of thumb2 tests to FileCheck.

llvm-svn: 78622

Modified VNInfo. The "copy" member is now a union which holds the copy for a register interval, or the defining register for a stack interval. Access is via getCopy/setCopy and getReg/setReg.

llvm-svn: 78620

MERGE_VALUES nodes. Replacing the result values with the
operands in one MERGE_VALUES node may cause another
MERGE_VALUES node be CSE'd with the first one, and bring
its uses along, so that the first one isn't dead, as this
code expects. Fix this by iterating until the node is
really dead. This fixes PR4699.

llvm-svn: 78619

node after legalize, and remove the workaround code from the
ARM backend.

llvm-svn: 78615

llvm-svn: 78612

llvm-svn: 78610

No functional change.

llvm-svn: 78608

llvm-svn: 78607

llvm-svn: 78604

PIC16 developers, please verify. 

llvm-svn: 78603

llvm-svn: 78602

llvm-svn: 78601

llvm-svn: 78600

llvm-svn: 78598

on target specific operands for testing class membership and converting to
MCInst operands.

llvm-svn: 78597

llvm-svn: 78596

llvm-svn: 78595

llvm-svn: 78594

llvm-svn: 78593

llvm-svn: 78587

llvm-svn: 78585

Start moving TargetLowering away from using full MVTs and towards SimpleValueType, which will simplify the privatization of IntegerType in the future.

llvm-svn: 78584

structure.

llvm-svn: 78581

llvm-svn: 78579

llvm-svn: 78577

llvm-svn: 78576

per pointer.

llvm-svn: 78574

llvm-svn: 78573

ld: bad offset (0x00000091) for lo14 instruction pic-base fix-up in ___popcountdi2 from libgcc/./_popcountsi2_s.o

The problem is that the non lazy symbol pointers need to be 8 byte aligned
on ppc64 and .section doesn't have an implicit alignment like ".non_lazy_symbol_pointer"
does.

llvm-svn: 78572

llvm-svn: 78571

llvm-svn: 78569

Add support for printing loop structure information in asm comments.
This definitely slows down asm output so put it under an -asm-exuberant
flag.

This information is useful when doing static analysis of performance
issues.

llvm-svn: 78567

llvm-svn: 78564

Post RA scheduler changes. Introduce a hazard recognizer that uses the target schedule information to accurately model the pipeline. Update the scheduler to correctly handle multi-issue targets.

llvm-svn: 78563