Note that when adding new instructions that you should refer to the table at the
bottom of PPCSchedule.td.

llvm-svn: 23830

llvm-svn: 23820

can be used by other targets.  For those targets that want to use it,
have at.  :)

llvm-svn: 23680

llvm-svn: 23621

llvm-svn: 23544

llvm-svn: 23099

llvm-svn: 23092

llvm-svn: 23048

llvm-svn: 22929

llvm-svn: 22921

llvm-svn: 22881

llvm-svn: 19241

llvm-svn: 16976

llvm-svn: 16635

llvm-svn: 16555

llvm-svn: 16551

specify aliases directly in register definitions.

Patch contributed by Jason Eckhardt!

llvm-svn: 16330

llvm-svn: 15959

llvm-svn: 15790

llvm-svn: 15788

llvm-svn: 15753

name of the generated asmwriter class, and the name of the format string.

llvm-svn: 15747

llvm-svn: 15642

llvm-svn: 15586

that TableGen creates for them, e.g. CodeEmitter, AsmPrinter, etc.

llvm-svn: 15579

llvm-svn: 15401

llvm-svn: 15383

stuff.  The pattern becomes a list, add some stuff, add some comments.

llvm-svn: 15378

llvm-svn: 15354

llvm-svn: 11304

llvm-svn: 9321

llvm-svn: 7870

llvm-svn: 7768

llvm-svn: 7767

Make load work
Make type inference infer from Arg1 to arg0 as well as from arg0 to arg1

llvm-svn: 7754

llvm-svn: 7726

llvm-svn: 7724

llvm-svn: 7708

llvm-svn: 7672

class

llvm-svn: 7634