-fno-dwarf2-cfi-asm. Implement the same behavior.

llvm-svn: 130637

llvm-svn: 130635

for all symbol differences and can drop the old EmitPCRelSymbolValue
method.

This also make getExprForFDESymbol on ELF equal to the one on MachO, and it
can be made non-virtual.

llvm-svn: 130634

less agressive about disabling cfi on linux :-(

llvm-svn: 130626

after folding ADD32ri to ADD32mi, so don't do that.

This only happens when the greedy register allocator gets itself in trouble and
spills %vreg9 here:

16L             %vreg9<def> = MOVPC32r 0, %ESP<imp-use>; GR32:%vreg9
48L             %vreg9<def> = ADD32ri %vreg9, <es:_GLOBAL_OFFSET_TABLE_>[TF=1], %EFLAGS<imp-def,dead>; GR32:%vreg9

That should never happen, the live range should be split instead.

llvm-svn: 130625

Currently the output should be almost identical to the one produced by CodeGen
to make the transition easier.

The only two differences I know of are:

* Some files get an extra advance loc of size 0. This will be fixed when
relaxations are enabled.
* The optimization of declaring an EH symbol as an external variable is not
implemented. This is a subset of adding the nounwind attribute, so we if really
this at -O0 we should probably do it at the IL level.

llvm-svn: 130623

range covers the entire block.

The live range can't be terminated at a random instruction.

llvm-svn: 130619

This obviously helps a lot if the division would be turned into a libcall
(think i64 udiv on i386), but div is also one of the few remaining instructions
on modern CPUs that become more expensive when the bitwidth gets bigger.

This also helps register pressure on i386 when dividing chars, divb needs
two 8-bit parts of a 16 bit register as input where divl uses two registers.

int foo(unsigned char a) { return a/10; }
int bar(unsigned char a, unsigned char b) { return a/b; }

compiles into (x86_64)
_foo:
  imull $205, %edi, %eax
  shrl  $11, %eax
  ret
_bar:
  movzbl        %dil, %eax
  divb  %sil, %al
  movzbl        %al, %eax
  ret

llvm-svn: 130615

This folds away silly stuff like (a&255)/1000 -> 0.

llvm-svn: 130614

is a bit ugly, but doing it on the base MCStreamer would be redundant
with the object streamer which does it using SD.

llvm-svn: 130611

llvm-svn: 130609

This could happen when trying to use a value that had been eliminated after dead
code elimination and folding loads.

llvm-svn: 130597

llvm-svn: 130596

the final assembly. It is the same technique used when targeting
assemblers that don't support .loc.

llvm-svn: 130587

llvm-svn: 130585

llvm-svn: 130582

llvm-svn: 130568

llvm-svn: 130562

Make FastEmit_ri_ try a bit harder to succeed for supported operations; FastEmit_i can fail for non-Thumb2 ARM.  Makes ARMSimplifyAddress work correctly, and reduces the number of fast-isel bailouts on non-Thumb ARM.

llvm-svn: 130560

llvm-svn: 130558

llvm-svn: 130557

llvm-svn: 130552

llvm-svn: 130551

if it ever did it needs the def machinery.

llvm-svn: 130549

llvm-svn: 130546

lets this code be used when producing assembly code for old assemblers without
uleb support.

llvm-svn: 130544

llvm-svn: 130543

llvm-svn: 130542

Fix a rather obscure crash caused by ARM fast-isel generating code which redefines a register.
rdar://problem/9338332 .

llvm-svn: 130539

llvm-svn: 130536

for bools, but is a start.

llvm-svn: 130534

llvm-svn: 130528

llvm-svn: 130527

llvm-svn: 130526

currently used, because variables don't get reported as being "defined".

llvm-svn: 130524

MC: Change variable symbols to be recognized as defined, by assigning their sections based on FindAssociatedSection().

llvm-svn: 130523

llvm-svn: 130522

llvm-svn: 130520

MC/Mach-O: Find section ordinal's by looking at the symbol, instead of assuming they are present in a fragment.

llvm-svn: 130519

Hoist MCLineEntry construction AsmPrinter so that anyone who derives from AsmPrinter can have line number entries.
PR 9810

llvm-svn: 130518