a condition's grouping. Every other use of Allocatable.test(Hint) groups it the
same way as it is indented, so move the parentheses to agree with that
grouping.

llvm-svn: 103869

When working top-down in a basic block, substituting physregs for virtregs, the use-def chains are kept up to date. That means we can recognize a virtreg kill by the use-def chain becoming empty.

This makes the fast allocator independent of incoming kill flags.

llvm-svn: 103866

llvm-svn: 103850

instructions.

e.g.
%reg1026<def> = VLDMQ %reg1025<kill>, 260, pred:14, pred:%reg0
%reg1027<def> = EXTRACT_SUBREG %reg1026, 6
%reg1028<def> = EXTRACT_SUBREG %reg1026<kill>, 5
...
%reg1029<def> = REG_SEQUENCE %reg1028<kill>, 5, %reg1027<kill>, 6, %reg1028, 7, %reg1027, 8, %reg1028, 9, %reg1027, 10, %reg1030<kill>, 11, %reg1032<kill>, 12

After REG_SEQUENCE is eliminated, we are left with:

%reg1026<def> = VLDMQ %reg1025<kill>, 260, pred:14, pred:%reg0
%reg1029:6<def> = EXTRACT_SUBREG %reg1026, 6
%reg1029:5<def> = EXTRACT_SUBREG %reg1026<kill>, 5

The regular coalescer will not be able to coalesce reg1026 and reg1029 because it doesn't
know how to combine sub-register indices 5 and 6. Now 2-address pass will consult the
target whether sub-registers 5 and 6 of reg1026 can be combined to into a larger
sub-register (or combined to be reg1026 itself as is the case here). If it is possible, 
it will be able to replace references of reg1026 with reg1029 + the larger sub-register
index.

llvm-svn: 103835

setting kill flags.

llvm-svn: 103832

llvm-svn: 103831

llvm-svn: 103830

llvm-svn: 103828

llvm-svn: 103827

llvm-svn: 103823

llvm-svn: 103822

llvm-svn: 103821

llvm-svn: 103820

llvm-svn: 103807

llvm-svn: 103806

while debugging what's mishandled about them in the post-RA pass.

llvm-svn: 103805

the variable actually tracks.

N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.

llvm-svn: 103802

llvm-svn: 103798

- Kill is implicit when use and def registers are identical.
- Only virtual registers can differ.

Add a -verify-fast-regalloc to run the verifier before the fast allocator.

llvm-svn: 103797

This adds extra security against using clobbered physregs, and it adds kill
markers to physreg uses.

llvm-svn: 103784

-filetype=obj test, and -filetype=obj leaks a few objects. Added a FIXME, we
need to sort out the ownership model for the various MC objects.

llvm-svn: 103769

 - This is a hack, but I can't decide the best place to handle this. Chris?

llvm-svn: 103765

llvm-svn: 103764

llvm-svn: 103748

This loop is quadratic in the capacity for a DenseMap:

  while(!map.empty())
    map.erase(map.begin());

Instead we now do a normal begin() - end() iteration followed by map.clear().
That also has the nice sideeffect of shrinking the map capacity on demand.

llvm-svn: 103747

one was subject to double rounding in extreme cases.

llvm-svn: 103744

llvm-svn: 103739

when they move instructions.

llvm-svn: 103737

use of it in MachineCSE.

llvm-svn: 103726

basic block.

llvm-svn: 103725

This causes way more identity copies to be generated, ripe for coalescing.

llvm-svn: 103686

llvm-svn: 103685

If REG_SEQUENCE source is livein, copy it first. Also, update livevariables information when a copy is introduced.

llvm-svn: 103680

llvm-svn: 103679

The X86 floating point stack pass and others depend on good kill flags.

llvm-svn: 103635

llvm-svn: 103586

Now, the .linkonce directive is emitted as part of MCSectionCOFF::PrintSwitchToSection instead of AsmPrinter::EmitLinkage since it is an attribute of the section the symbol was placed into not the symbol itself.

llvm-svn: 103568

llvm-svn: 103539

llvm-svn: 103538

llvm-svn: 103530