llvm-svn: 78678

llvm-svn: 78677

other is a subclass of it is effectively handled by the prior tests.

llvm-svn: 78676

llvm-svn: 78666

llvm-svn: 78665

llvm-svn: 78659

match base only address, i.e. [r] since Thumb2 requires a offset register field.
For those, use [r + imm12] where the immediate is zero.
Note the generated assembly code does not look any different after the patch.
But the bug would have broken the JIT (if there is Thumb2 support) and it can
break later passes which expect the address mode to be well-formed.

llvm-svn: 78658

llvm-svn: 78657

llvm-svn: 78655

llvm-svn: 78654

the overloaded vector types allowed floating-point or integer vector elements.
Most of these operations actually depend on the element type, so bitcasting
was not an option.

If you include the vpadd intrinsics that I updated earlier, this gets rid
of 20 intrinsics.

llvm-svn: 78646

llvm-svn: 78642

Passing of indirect arguments starts after return value on the callee's frame.

llvm-svn: 78635

llvm-svn: 78632

INT i8.  These instructions are only for interpretation by disassemblers, not
for emission, so they do not as yet have patterns.

llvm-svn: 78630

llvm-svn: 78629

llvm-svn: 78627

and short. Well, it's kinda short. Definitely nasty and brutish.

The front-end generates the register/unregister calls into the SjLj runtime,
call-site indices and landing pad dispatch. The back end fills in the LSDA
with the call-site information provided by the front end. Catch blocks are
not yet implemented.

Built on Darwin and verified no llvm-core "make check" regressions.

llvm-svn: 78625

Enable Thumb2 instruction shrinking (32-bit to 16-bit) pass. Convert a bunch of thumb2 tests to FileCheck.

llvm-svn: 78622

node after legalize, and remove the workaround code from the
ARM backend.

llvm-svn: 78615

llvm-svn: 78610

No functional change.

llvm-svn: 78608

llvm-svn: 78604

PIC16 developers, please verify. 

llvm-svn: 78603

llvm-svn: 78600

llvm-svn: 78598

on target specific operands for testing class membership and converting to
MCInst operands.

llvm-svn: 78597

llvm-svn: 78595

llvm-svn: 78594

llvm-svn: 78593

llvm-svn: 78587

Start moving TargetLowering away from using full MVTs and towards SimpleValueType, which will simplify the privatization of IntegerType in the future.

llvm-svn: 78584

structure.

llvm-svn: 78581

llvm-svn: 78576

per pointer.

llvm-svn: 78574

llvm-svn: 78573

ld: bad offset (0x00000091) for lo14 instruction pic-base fix-up in ___popcountdi2 from libgcc/./_popcountsi2_s.o

The problem is that the non lazy symbol pointers need to be 8 byte aligned
on ppc64 and .section doesn't have an implicit alignment like ".non_lazy_symbol_pointer"
does.

llvm-svn: 78572

llvm-svn: 78571

llvm-svn: 78564

llvm-svn: 78562