llvm-svn: 153935

llvm-svn: 153922

I just noticed Jakob's examples of the proper application of
std::set... routines.

llvm-svn: 153918

llvm-svn: 153875

This way we can get AVX v-prefixed instructions tail merged with the normal insns.

llvm-svn: 153869

Reorder fields in MatchEntry and OperandMatchEntry to reduce padding. A bit tricky due to the target specific sizes for some of the fields so the ordering is only optimal for the targets in the tree.

llvm-svn: 153865

Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations.

llvm-svn: 153863

llvm-svn: 153857

Use SequenceToOffsetTable to create instruction name table. Saves space particularly on X86 where AVX instructions just add a 'v' to the front of other instructions.

llvm-svn: 153841

This also avoids emitting the information twice, which led to code bloat. On i386-linux-Release+Asserts
with all targets built this change shaves a whopping 1.3 MB off clang. The number is probably exaggerated
by recent inliner changes but the methods were already enormous with the old inline cost computation.

The DWARF reg -> LLVM reg mapping doesn't seem to have holes in it, so it could be a simple lookup table.
I didn't implement that optimization yet to avoid potentially changing functionality.

There is still some duplication both in tablegen and the generated code that should be cleaned up eventually.

llvm-svn: 153837

llvm-svn: 153796

First small step toward modeling multi-register multi-pressure. In the
future, register units can also be used to model liveness and
aliasing.

llvm-svn: 153794

It's slow, bloated and completely redundant with MCRegisterClass::contains.

llvm-svn: 153782

This allows suffix sharing in register names. (AX is a suffix of EAX).

llvm-svn: 153777

Use an explicit comparator instead of the default.

The sets are sorted, but not using the default comparator. Hopefully,
this will unbreak the Linux builders.

llvm-svn: 153772

--enable-expensive-checks build.

llvm-svn: 153771

Many register classes have the same value types. Share the table space.

llvm-svn: 153764

TableGen emits lists of sub-registers, super-registers, and overlaps. Put
them all in a single table and use a SequenceToOffsetTable to share
suffixes.

llvm-svn: 153761

This is similar to the StringToOffsetTable we use to produce string
tables, but it can be used for other sequences than strings, and it
eliminates entries for suffixes.

llvm-svn: 153760

llvm-svn: 153667

The arm_neon intrinsics can create virtual registers from the DPair
register class which allows both even-odd and odd-even D-register pairs.

This fixes PR12389.

llvm-svn: 153603

llvm-svn: 153457

llvm-svn: 153432

llvm-svn: 153328

llvm-svn: 153125

llvm-svn: 152906

Const-correct the FixedLenDecoderEmitter. Pass a few things by const reference instead of value to avoid some copying.

llvm-svn: 152899

Spacing fixes. Mostly aligning arguments that spilled onto next line with the opening parenthese instead of 2 spaces in.

llvm-svn: 152889

Remove unused field NumVariable from Filter class. Even it was needed the same result could be found with VariableInstructions.size(). Also fix some typos in comments.

llvm-svn: 152885

llvm-svn: 152840

We currently assume that all targets have less than 64k opcodes. We
shouldn't limit it further.

llvm-svn: 152833

We cannot limit the concatenated instruction names to 64K.  ARM is
already at 32K, and it is easy to imagine a target with more
instructions.

llvm-svn: 152817

This patch limited the concatenated register names to 64K which meant
that the total number of registers was many times less than 64K.

If any compilers actually enforce the 64K limit on string literals, and
it turns out to be a problem, we should fix that problem by not using
long string literals.

llvm-svn: 152816

Remove unused field from FixedLenDecoderEmitter. Move NumberedInstructions declaration from class to run method since its only used there and was being reinitialized anyway.

llvm-svn: 152616

llvm-svn: 152581

llvm-svn: 152538

Shrink and reorder some fields in MCOperandInfo to fit it in 8 bytes to reduce size of static tables.

llvm-svn: 152524

prefix.  Added a FIXME to remind us this still does not work when it is not the
first prefix.

llvm-svn: 152414

~0U might be i32 on 32-bit hosts, then (uint64_t)~0U might not be expected as (i64)0xFFFFFFFF_FFFFFFFF, but as (i64)0x00000000_FFFFFFFF.

llvm-svn: 152407

llvm-svn: 152301