llvm-svn: 77764

instructions for calls since BL and BLX are always 32-bit long and BX is always
16-bit long.

Also, we should be using BLX to call external function stubs.

llvm-svn: 77756

llvm-svn: 77744

llvm-svn: 77743

MCSection subclasses yet, but this is a step in the right direction.

llvm-svn: 77708

to ensure the instruction that follows a TBB (when the number of table entries
is odd) is 2-byte aligned.
Patch by Sandeep Patel.

llvm-svn: 77705

  is scaled by two.
- Teach GetInstSizeInBytes about TBB and TBH.

llvm-svn: 77701

initialize method, which can be called when an MCContext is available.

llvm-svn: 77687

When fp is not eliminated, instructions with T2_i12 modes will be changed to T2_i8 ones. Take that into consideration when determining stack size limit for reserving register scavenging slot.

llvm-svn: 77642

llvm-svn: 77632

llvm-svn: 77627

llvm-svn: 77625

llvm-svn: 77622

llvm-svn: 77611

llvm-svn: 77598

a Twine, e.g., for names).
 - I am a little ambivalent about this; we don't want the string conversion of
   utostr, but using overload '+' mixed with string and integer arguments is
   sketchy. On the other hand, this particular usage is something of an idiom.

llvm-svn: 77579

llvm-svn: 77557

llvm-svn: 77522

llvm-svn: 77521

llvm-svn: 77507

support multiple different pointer register classes.

llvm-svn: 77501

- Darwin Thumb2 call clobbers r9.

llvm-svn: 77500

wide vectors.  Likewise, change VSTn intrinsics to take separate arguments
for each vector in a multi-vector struct.  Adjust tests accordingly.

llvm-svn: 77468

No functionality change.

llvm-svn: 77432

llvm-svn: 77422

Thumb-2: fix typo that caused incorrect stack elimination for VFP operations and very large stack frames.

llvm-svn: 77401

New name is Metadata.h.

llvm-svn: 77370

In thumb2 mode, add pc is unpredictable. Use add + mov pc instead (that is until more optimization goes in).

llvm-svn: 77364

llvm-svn: 77363

llvm-svn: 77350

llvm-svn: 77340

mode, and "ld64" (the default linker) falls back to it in -static
mode.

llvm-svn: 77334

llvm-svn: 77329

llvm-svn: 77305

llvm-svn: 77301

- This change also makes it possible to switch between ARM / Thumb on a
  per-function basis.
- Fixed thumb2 routine which expand reg + arbitrary immediate. It was using
  using ARM so_imm logic.
- Use movw and movt to do reg + imm when profitable.
- Other code clean ups and minor optimizations.

llvm-svn: 77300

it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.

Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.

This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
   pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
   CStringSection_.  Factor the code better.
5. fixes some bugs in string lowering on ELF targets.

llvm-svn: 77294

llvm-svn: 77275

Remove TPat. No patterns depend on just isThumb(). Must use either T1Pat (isThumb1Only()) or T2Pat (is Thumb2).

llvm-svn: 77242

llvm-svn: 77233