Commits · 7707d8aa9db8aa3814593f9c40cc707f306e3ae2 · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

Nov 26, 2019
- [XCOFF][AIX] Check linkage on the function, and two fixes for comments · 7707d8aa
  jasonliu authored Nov 26, 2019
  7707d8aa
- [AMDGPU] Fix emitIfBreak CF lowering: use temp reg to make register coalescer life easier. · 008e65a7
  vpykhtin authored Nov 18, 2019
  008e65a7
- [RISCV] Handle fcopysign(f32, f64) and fcopysign(f64, f32) · d7be3eab
  Luís Marques authored Nov 26, 2019
  d7be3eab
- [X86][MC] no error diagnostic for out-of-range jrcxz/jecxz/jcxz · e73f78ac
  Alexey Lapshin authored Nov 15, 2019
  e73f78ac
- [AArch64][SVE] Implement floating-point conversion intrinsics · 4a649ad2
  Kerry McLaughlin authored Nov 26, 2019
  4a649ad2
- [ARM][ReachingDefs] Remove dead code in loloops. · 28166816
  Sam Parker authored Nov 26, 2019
  28166816
- [SystemZ] Don't build a PPA instruction with an immediate 0 operand. · 3ec193fb
  Jonas Paulsson authored Nov 26, 2019
  3ec193fb
- [ARM][ReachingDefs] RDA in LoLoops · cced971f
  Sam Parker authored Nov 26, 2019
  cced971f
- [ARM][ConstantIslands] Correct block size update · 4a59eedd
  Sam Parker authored Nov 21, 2019
  4a59eedd
- [X86] Return Op instead of SDValue() for lowering flags_read/write intrinsics · 1b209083
  Craig Topper authored Nov 25, 2019
  1b209083
- [BPF] add "llvm." prefix to BPF internally created globals · 6db023b9
  Yonghong Song authored Nov 25, 2019
  6db023b9
- [X86] Add support for STRICT_FP_ROUND/STRICT_FP_EXTEND from/to fp128 to/from... · c43b8ec7
  Craig Topper authored Nov 25, 2019
  c43b8ec7
- [X86] Add proper execution domain information to the avx512vnni instructions. · 3687ddef
  Craig Topper authored Nov 25, 2019
  
  3687ddef
Nov 25, 2019
- [PowerPC] Rename DarwinDirective to CPUDirective (NFC) · 85e4f5bc
  Kit Barton authored Nov 15, 2019
  85e4f5bc
- [ARM] Generate CMSE instructions from CMSE intrinsics · 09555ce0
  Momchil Velikov authored Nov 18, 2019
  09555ce0
- [SystemZ] Return the right offsets from getCalleeSavedSpillSlots(). · a7d3f693
  Jonas Paulsson authored Nov 25, 2019
  a7d3f693
- [PowerPC] Fix VSX clobbers of CSR registers · 7fbaa809
  Nemanja Ivanovic authored Nov 25, 2019
  7fbaa809
- [AMDGPU] Fix function name in debug output · 357bd914
  Jay Foad authored Nov 25, 2019
  
  357bd914
- [AIX][XCOFF] Generate undefined symbol in symbol table for external function call · 906ecae2
  jasonliu authored Nov 25, 2019
  906ecae2
- [ARM][MVE] Select vqneg · 6fc3e6f2
  Anna Welker authored Nov 25, 2019
  6fc3e6f2
- [AVR] Fix endianness handling in AVR MC · 29b4d8f1
  serge_sans_paille authored Sep 24, 2019
  29b4d8f1
- Revert "[PowerPC] combine rlwinm+rlwinm to rlwinm" · d1c16598
  czhengsz authored Nov 24, 2019
  d1c16598
Nov 24, 2019
- [PowerPC] Spill CR LT bits on P9 using setb · d1dded28
  Amy Kwan authored Nov 24, 2019
  d1dded28
Nov 23, 2019
- Reland 'Fixed -Wdeprecated-copy warnings. NFCI.' · 745b6dea
  Dávid Bolvanský authored Nov 23, 2019
  745b6dea
- Revert 'Fixed -Wdeprecated-copy warnings. NFCI.' · 111a4cff
  Dávid Bolvanský authored Nov 23, 2019
  111a4cff
- Fixed -Wdeprecated-copy warnings. NFCI. · 7124b45b
  Dávid Bolvanský authored Nov 23, 2019
  
  7124b45b
- [NFC] [AArch64] Fix wrong documentation for IsStoreRegOffsetOp · b8e6319f
  David Tellenbach authored Nov 23, 2019
  
  b8e6319f
- AMDGPU: Handle waitcnt overflow · fef69706
  Austin Kerbow authored Nov 02, 2019
  fef69706
- [X86][SSE] Split off generic isLaneCrossingShuffleMask helper. NFC. · 5d9a259a
  Simon Pilgrim authored Nov 23, 2019
  5d9a259a
Nov 22, 2019
- [AArch64] Add the pipeline model for Exynos M5 · 48b7fe02
  Evandro Menezes authored Sep 23, 2019
  48b7fe02
- [WebAssembly][SelectionDAG] Remove unused WebAssemblyDAGToDAGISel::ForCodeSize. · 70a3c9f5
  Hiroshi Yamauchi authored Nov 21, 2019
  70a3c9f5
- [BPF] Fix a recursion bug in BPF Peephole ZEXT optimization · 9e6aa815
  Yonghong Song authored Nov 22, 2019
  9e6aa815
- [PowerPC] Implement the vector extend sign instruction pattern match · a4cc895a
  QingShan Zhang authored Nov 22, 2019
  a4cc895a
- [PowerPC] combine rlwinm+rlwinm to rlwinm · 29f6f9b2
  czhengsz authored Nov 22, 2019
  29f6f9b2
- [X86] Add test cases for most of the constrained fp libcalls with fp128. · b29e5cdb
  Craig Topper authored Nov 21, 2019
  b29e5cdb
- [X86] Mark fp128 FMA as LibCall instead of Expand. Add STRICT_FMA as well. · fc4020db
  Craig Topper authored Nov 21, 2019
  fc4020db
- [FPEnv] Add an option to disable strict float node mutating to an normal · 22a0edd0
  Pengfei Wang authored Nov 21, 2019
  22a0edd0
- [LegalizeDAG][X86] Add support for turning STRICT_FADD/SUB/MUL/DIV into... · 7696b992
  Craig Topper authored Nov 21, 2019
  7696b992
- [X86] Mark vector STRICT_FADD/STRICT_FSUB as Legal and add mutation to X86ISelDAGToDAG · 95f44cf4
  Craig Topper authored Nov 21, 2019
  95f44cf4
- [AArch64] [FrameLowering] Allow conditional insertion of CFI instruction · 75434366
  David Tellenbach authored Nov 22, 2019
  75434366