- Jun 03, 2013
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Venkatraman Govindaraju authored
using two instructions (sethi and store). llvm-svn: 183090
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- Jun 02, 2013
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Venkatraman Govindaraju authored
llvm-svn: 183088
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Rui Ueyama authored
Reviewers: Bigcheese CC: llvm-commits Differential Revision: http://llvm-reviews.chandlerc.com/D905 llvm-svn: 183087
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Jim Grosbach authored
llvm-svn: 183086
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Venkatraman Govindaraju authored
llvm-svn: 183083
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Benjamin Kramer authored
llvm-svn: 183081
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- Jun 01, 2013
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Nick Lewycky authored
index greater than the size of the vector is invalid. The shuffle may be shrinking the size of the vector. Fixes a crash! Also drop the maximum recursion depth of the safety check for this optimization to five. llvm-svn: 183080
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Venkatraman Govindaraju authored
llvm-svn: 183079
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David Majnemer authored
llvm-svn: 183078
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Benjamin Kramer authored
Also simplify code a bit while there. No functionality change. llvm-svn: 183076
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Benjamin Kramer authored
No functionality change. llvm-svn: 183075
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Benjamin Kramer authored
llvm-svn: 183074
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Benjamin Kramer authored
llvm-svn: 183073
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Benjamin Kramer authored
llvm-svn: 183072
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Tim Northover authored
llvm-svn: 183071
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Tim Northover authored
Very sorry, it was committed from the wrong branch by mistake. llvm-svn: 183070
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Tim Northover authored
llvm-svn: 183069
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Tim Northover authored
The MOV64ri64i32 instruction required hacky MCInst lowering because it was allocated as setting a GR64, but the eventual instruction ("movl") only set a GR32. This converts it into a so-called "MOV32ri64" which still accepts a (appropriate) 64-bit immediate but defines a GR32. This is then converted to the full GR64 by a SUBREG_TO_REG operation, thus keeping everyone happy. This fixes a typo in the opcode field of the original patch, which should make the legact JIT work again (& adds test for that problem). llvm-svn: 183068
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Venkatraman Govindaraju authored
llvm-svn: 183067
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Michael Gottesman authored
Removed a comment above an include which is unnecessary and added a missing closing @} for a doxygen comment. llvm-svn: 183065
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Michael Gottesman authored
llvm-svn: 183064
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Michael Gottesman authored
Also added a few more method comments and performed some copy editing. llvm-svn: 183063
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Ahmed Bougacha authored
This also makes TableGen able to compute sizes/offsets of synthesized indices representing tuples. llvm-svn: 183061
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Andrew Trick authored
Fixes rdar:14036816, PR16130. There is an opportunity to compute precise trip counts for 'or' expressions and multi-exit loops. rdar:14038809: Optimize trip count computation for multi-exit loops. To do this we need to record the fact that ExitLimit assumes NSW. When it does not we can safely assume that the loop trip count is the minimum ExitLimt across all subexpressions and loop exits. llvm-svn: 183060
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Eric Christopher authored
seems to have caused PR16192 and other JIT related failures. llvm-svn: 183059
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Eric Christopher authored
llvm-svn: 183057
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Eric Christopher authored
llvm-svn: 183054
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Eric Christopher authored
llvm-svn: 183053
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Eric Christopher authored
llvm-svn: 183052
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Eric Christopher authored
llvm-svn: 183051
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- May 31, 2013
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Arnold Schwaighofer authored
Use ScalarEvolution's getBackedgeTakenCount API instead of getExitCount since that is really what we want to know. Using the more specific getExitCount was safe because we made sure that there is only one exiting block. No functionality change. llvm-svn: 183047
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Quentin Colombet authored
Account for the cost of scaling factor in Loop Strength Reduce when rating the formulae. This uses a target hook. The default implementation of the hook is: if the addressing mode is legal, the scaling factor is free. <rdar://problem/13806271> llvm-svn: 183045
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Rafael Espindola authored
llvm-svn: 183043
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Rafael Espindola authored
llvm-svn: 183042
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Rafael Espindola authored
llvm-svn: 183041
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Rafael Espindola authored
llvm-svn: 183040
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Arnold Schwaighofer authored
We check that instructions in the loop don't have outside users (except if they are reduction values). Unfortunately, we skipped this check for if-convertable PHIs. Fixes PR16184. llvm-svn: 183035
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Benjamin Kramer authored
Fixes a leak found by valgrind. llvm-svn: 183031
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Michael Gottesman authored
llvm-svn: 183028
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Quentin Colombet authored
Namely, check if the target allows to fold more that one register in the addressing mode and if yes, adjust the cost accordingly. Prior to this commit, reg1 + scale * reg2 accesses were artificially preferred to reg1 + reg2 accesses. Indeed, the cost model wrongly assumed that reg1 + reg2 needs a temporary register for the computation, whereas it was correctly estimated for reg1 + scale * reg2. <rdar://problem/13973908> llvm-svn: 183021
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