* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
  they need to be matched before LEA.

llvm-svn: 26376

  and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
  mentioned leaf nodes. Do not mutate and nodes and do not record the
  selection in CodeGenMap. These nodes should be safe to duplicate. This is
  a performance win.

llvm-svn: 26335

1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.

llvm-svn: 26324

Suppose base == %eax and it has multiple uses, then instead of
  movl %eax, %ecx
  addl $8, %ecx
use
  leal 8(%eax), %ecx.

llvm-svn: 26323

llvm-svn: 26273

X86 addressing mode. Currently we do not allow any node whose target node
produces a chain as well as any node that is at the root of the addressing
mode expression tree.

llvm-svn: 26117

llvm-svn: 26111

llvm-svn: 26110

llvm-svn: 26096

llvm-svn: 26085

SDOperand Select(SDOperand N);
to
void Select(SDOperand &Result, SDOperand N);

llvm-svn: 26067

- Manually select SDOperand's returned by TryFoldLoad which make up the
  load address.

llvm-svn: 26012

llvm-svn: 25997

llvm-svn: 25983

tblgen patch reverted.

llvm-svn: 25971

Select them afterwards if it returns true.

llvm-svn: 25968

- Use XORP* to implement fneg.

llvm-svn: 25857

llvm-svn: 25679

llvm-svn: 25515

llvm-svn: 25436

llvm-svn: 25435

llvm-svn: 25368

llvm-svn: 25333

llvm-svn: 25322

llvm-svn: 25225

* Allow a register node as SelectAddr() base.
* ExternalSymbol -> TargetExternalSymbol as direct function callee.
* Use X86::ESP register rather than CopyFromReg(X86::ESP) as stack ptr for
  call parmater passing.

llvm-svn: 25207

llvm-svn: 25192

llvm-svn: 25191

llvm-svn: 25188

* Some reorg.

llvm-svn: 25163

* Fixed a load folding bug.

llvm-svn: 25136

llvm-svn: 25132

llvm-svn: 25120

llvm-svn: 25108

llvm-svn: 25103

* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.

llvm-svn: 24921

llvm-svn: 24889

  for Darwin.
* Added lowering hook for ISD::RET. It inserts CopyToRegs for the return
  value (or store / fld / copy to ST(0) for floating point value). This
  eliminate the need to write C++ code to handle RET with variable number
  of operands.

llvm-svn: 24888

llvm-svn: 24867

llvm-svn: 24775