Commits · 77e271cb4e2f75f635d4aa63e5c6a2ddef36a8a7 · Roger Ferrer / llvm-epi-0.8

Mar 24, 2006
- Gabor points out that we can't spell. :) · f5efddf8
  Chris Lattner authored Mar 24, 2006
```
llvm-svn: 27049
```
  f5efddf8
- All v2f64 shuffle cases can be handled. · a91d8a5b
  Evan Cheng authored Mar 24, 2006
```
llvm-svn: 27044
```
  a91d8a5b
- More efficient v2f64 shuffle using movlhps, movhlps, unpckhpd, and unpcklpd. · 2595a687
  Evan Cheng authored Mar 24, 2006
```
llvm-svn: 27040
```
  2595a687
- A new entry · 6afb3c2d
  Evan Cheng authored Mar 24, 2006
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llvm-svn: 27039
```
  6afb3c2d
- Handle more shuffle cases with SHUFP* instructions. · d27fb3e8
  Evan Cheng authored Mar 24, 2006
```
llvm-svn: 27024
```
  d27fb3e8
Mar 23, 2006
- Typo · f842ea57
  Evan Cheng authored Mar 23, 2006
```
llvm-svn: 26997
```
  f842ea57
- Add support to locate local variables in frames (early version.) · 3c43609f
  Jim Laskey authored Mar 23, 2006
```
llvm-svn: 26994
```
  3c43609f
- Change interface to DwarfWriter. · cf0166fb
  Jim Laskey authored Mar 23, 2006
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llvm-svn: 26991
```
  cf0166fb
- Fix the encodings of these new instructions, hopefully fixing the JIT · ce0206e1
  Chris Lattner authored Mar 23, 2006
```
failures from last night

llvm-svn: 26981
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  ce0206e1
- Following icc's lead: use movdqa to load / store 128-bit integer vectors · 82ed4a42
  Evan Cheng authored Mar 23, 2006
```
llvm-svn: 26980
```
  82ed4a42
- Eliminate IntrinsicLowering from TargetMachine. · 6f95ab7a
  Chris Lattner authored Mar 23, 2006
```
Make the CBE and V9 backends create their own, since they're the only ones that use it.

llvm-svn: 26974
```
  6f95ab7a
- Add v4i32 <-> v4f32 bitconvert patterns. · 70558781
  Evan Cheng authored Mar 23, 2006
```
llvm-svn: 26969
```
  70558781
- Add 128-bit integer vector load and add (for testing). · b9b0550d
  Evan Cheng authored Mar 23, 2006
```
llvm-svn: 26967
```
  b9b0550d
- Add support for 8 bit immediates with 16/32 bit cmp instructions · fb6e0293
  Nate Begeman authored Mar 23, 2006
```
llvm-svn: 26966
```
  fb6e0293
Mar 22, 2006
- Added a ValueType operand to isShuffleMaskLegal(). For now, x86 will not do · 021bb7c9
  Evan Cheng authored Mar 22, 2006
```
64-bit vector shuffle.

llvm-svn: 26964
```
  021bb7c9
- SHUFP* are two address code. · ed794cd2
  Evan Cheng authored Mar 22, 2006
```
llvm-svn: 26959
```
  ed794cd2
- Some clean up. · bc047228
  Evan Cheng authored Mar 22, 2006
```
llvm-svn: 26957
```
  bc047228
- - Supposely movlhps is faster / better than unpcklpd. · d4e15579
  Evan Cheng authored Mar 22, 2006
```
- Don't forget pshufd is only available with sse2.

llvm-svn: 26956
```
  d4e15579
- - Implement X86ISelLowering::isShuffleMaskLegal(). We currently only support · 68ad48bd
  Evan Cheng authored Mar 22, 2006
```
  splat and PSHUFD cases.
- Clean up shuffle / splat matching code.

llvm-svn: 26954
```
  68ad48bd
- - VECTOR_SHUFFLE of v4i32 / v4f32 with undef second vector always matches · 8fdbdf20
  Evan Cheng authored Mar 22, 2006
```
  PSHUFD. We can make permutes entries which point to the undef pointing
  anything we want.
- Change some names to appease Chris.

llvm-svn: 26951
```
  8fdbdf20
- Fix PSHUF* and SHUF* jit code emission problems · 3617caf5
  Evan Cheng authored Mar 22, 2006
```
llvm-svn: 26949
```
  3617caf5
- fix a warning · f5e36c8b
  Chris Lattner authored Mar 22, 2006
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llvm-svn: 26941
```
  f5e36c8b
- Some splat and shuffle support. · d097e675
  Evan Cheng authored Mar 22, 2006
```
llvm-svn: 26940
```
  d097e675
- Add a couple more pseudo instructions. · b1d3c64d
  Evan Cheng authored Mar 22, 2006
```
llvm-svn: 26939
```
  b1d3c64d
- Didn't mean to check this in. No MMX support yet. · baea59c6
  Evan Cheng authored Mar 21, 2006
```
llvm-svn: 26933
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  baea59c6
- - Use movaps to store 128-bit vector integers. · d5e905d7
  Evan Cheng authored Mar 21, 2006
```
- Each scalar to vector v8i16 and v16i8 is a any_extend followed by a movd.

llvm-svn: 26932
```
  d5e905d7
Mar 21, 2006
- These targets don't support EXTRACT_VECTOR_ELT, though, in time, X86 will. · 00f4683b
  Chris Lattner authored Mar 21, 2006
```
llvm-svn: 26930
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  00f4683b
- Combine 2 entries · 2d819f5f
  Evan Cheng authored Mar 21, 2006
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llvm-svn: 26921
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  2d819f5f
- Add a note about x86 register coallescing · aeebc960
  Evan Cheng authored Mar 21, 2006
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llvm-svn: 26920
```
  aeebc960
- - Remove scalar to vector pseudo ops. They are just wrong. · 1208d917
  Evan Cheng authored Mar 21, 2006
```
- Handle FR32 to VR128:v4f32 and FR64 to VR128:v2f64 with aliases of MOVAPS
and MOVAPD. Mark them as move instructions and *hope* they will be deleted.

llvm-svn: 26919
```
  1208d917
- x86 ISD::SCALAR_TO_VECTOR support. · e4d14162
  Evan Cheng authored Mar 21, 2006
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llvm-svn: 26911
```
  e4d14162
- Junk unused vector register classes. · fb872b41
  Evan Cheng authored Mar 21, 2006
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llvm-svn: 26910
```
  fb872b41
Mar 20, 2006
- Add a build_vector node · 80b6bd27
  Chris Lattner authored Mar 20, 2006
```
llvm-svn: 26895
```
  80b6bd27
- Move a few things around. · e6448448
  Evan Cheng authored Mar 20, 2006
```
llvm-svn: 26893
```
  e6448448
Mar 19, 2006
- add a note with a testcase · d16f6fdd
  Chris Lattner authored Mar 19, 2006
```
llvm-svn: 26877
```
  d16f6fdd
- Vector undef's · f7c2e362
  Evan Cheng authored Mar 19, 2006
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llvm-svn: 26870
```
  f7c2e362
- Turning on LSR by default · 5111c81a
  Evan Cheng authored Mar 19, 2006
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llvm-svn: 26861
```
  5111c81a
- Remember which tests are hurt by LSR. · 66a9c0de
  Evan Cheng authored Mar 19, 2006
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llvm-svn: 26860
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  66a9c0de
- rename these nodes · f7b6e721
  Chris Lattner authored Mar 19, 2006
```
llvm-svn: 26848
```
  f7b6e721
Mar 18, 2006
- Use the generic vector register classes VR64 / VR128 rather than V4F32, · 9bf978dc
  Evan Cheng authored Mar 18, 2006
```
V8I16, etc.

llvm-svn: 26838
```
  9bf978dc