The minor bug heuristic was noticed by inspection. I added the
isLoser/isValid helpers because they will become more
important with subsequent checkins.

llvm-svn: 140580

llvm-svn: 140579

llvm-svn: 140573

llvm-svn: 140572

llvm-svn: 140570

llvm-svn: 140569

registers, so there is no need to check here.

llvm-svn: 140568

llvm-svn: 140567

I did not convert Atomics-32.ll and Atomics-64.ll by hand; the diff is autoupgrade output.

The wmb test is gone because there isn't any way to express wmb with the new atomic instructions; if someone really needs a non-asm way to write a wmb on Alpha, a platform-specific intrisic could be added.

llvm-svn: 140566

llvm-svn: 140564

llvm-svn: 140563

llvm-svn: 140561

llvm-svn: 140560

llvm-svn: 140559

llvm-svn: 140558

Enhance alias analysis for atomic instructions a bit.  Upgrade a couple alias-analysis tests to the new atomic instructions.

llvm-svn: 140557

llvm-svn: 140556

llvm-svn: 140553

llvm-svn: 140549

llvm-svn: 140548

printing of local offsets

llvm-svn: 140547

Fix emission of debug data for global variables. getContext() on DIGlobalVariables is not valid any more.

llvm-svn: 140539

llvm-svn: 140537

llvm-svn: 140536

llvm-svn: 140535

llvm-svn: 140534

llvm-svn: 140533

llvm-svn: 140532

llvm-svn: 140517

PR11004: Inline memcpy to avoid generating nested call sequence. Un-XFAIL 2011-06-09-TailCallByVal and 2010-11-04-BigByval

llvm-svn: 140516

llvm-svn: 140515

Many targets use pseudo instructions to help register allocation.  Like
the COPY instruction, these pseudos can be expanded after register
allocation.  The early expansion can make life easier for PEI and the
post-ra scheduler.

This patch adds a hook that is called for all remaining pseudo
instructions from the ExpandPostRAPseudos pass.

llvm-svn: 140472

SDNodes may return values which are wider than the incoming element types. In
this patch we fix the integer promotion of these nodes.

Fixes spill-q.ll when running -promote-elements.

llvm-svn: 140471

No functional change intended.

llvm-svn: 140470

I'll fix the file contents in the next commit.

This pass is currently expanding the COPY and SUBREG_TO_REG pseudos. I
am going to add a hook so targets can expand more pseudo-instructions
after register allocation.

Many targets have pseudo-instructions that assist the register
allocator.  They can be expanded after register allocation, before PEI
and PostRA scheduling.

llvm-svn: 140469

llvm-svn: 140465

Implement Duncan's suggestion to use the result of getSetCCResultType if it is legal
(this is always the case for scalars), otherwise use the promoted result type.

Fix test/CodeGen/X86/vsplit-and.ll when promote-elements is enabled.

llvm-svn: 140464

When generating the trunc-store of i1's, we need to use the vector type and not
the scalar type.

This patch fixes the assertion in CodeGen/Generic/bool-vector.ll when
running with -promote-elements.

llvm-svn: 140463

llvm-svn: 140446

llvm-svn: 140445