Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.

llvm-svn: 36652

llvm-svn: 36648

llvm-svn: 36632

llvm-svn: 36483

- A register def / use now implicitly affects sub-register liveness but does
not affect liveness information of super-registers.
- Def of a larger register (if followed by a use later) is treated as
read/mod/write of a smaller register.

llvm-svn: 36434

llvm-svn: 36250

llvm-svn: 36240

long live interval that has low usage density.
1. Change order of coalescing to join physical registers with virtual
   registers first before virtual register intervals become too long.
2. Check size and usage density to determine if it's worthwhile to join.
3. If joining is aborted, assign virtual register live interval allocation
   preference field to the physical register.
4. Register allocator should try to allocate to the preferred register
   first (if available) to create identify moves that can be eliminated.

llvm-svn: 36218

llvm-svn: 35660

Trivially re-materializable instructions have spill weights that are half of what it would be otherwise.

llvm-svn: 35658

llvm-svn: 35600

of dead def live interval at 1 to avoid multiple def's targeting the same
register. The previous patch missed a case where the source operand is live-in.
In that case, remove the whole interval.

llvm-svn: 35512

llvm-svn: 35419

not violate that.

llvm-svn: 35396

llvm-svn: 35365

where the destination is dead.

llvm-svn: 35252

llvm-svn: 35208

llvm-svn: 35165

llvm-svn: 35153

- Use distance to closest use to determine whether to abort coalescing.

llvm-svn: 35141

to be really bad. Once they are joined they are not broken apart. Also, physical
intervals cannot be spilled!

Added a heuristic as a workaround for this. Be careful coalescing with a
physical register if the virtual register uses are "far". Check if there are
uses in the same loop as the source (copy instruction). Check if it is in the
loop preheader, etc.

llvm-svn: 35134

llvm-svn: 35117

entry (0x8b056f0, LLVM BB @0x8b01b30, ID#0):
Live Ins: %r0 %r1 %r2 %r3
        %reg1032 = tMOVrr %r3<kill>
        %reg1033 = tMOVri8 1
        %reg1034 = tMOVri8 0
        tCMPi8 %reg1029<kill>, 0
        tBcc mbb<entry,0x8b06a10>, 0
    Successors according to CFG: 0x8b06980 0x8b06a10

entry (0x8b06980, LLVM BB @0x8b01b30, ID#12):
    Predecessors according to CFG: 0x8b056f0
        %reg1036 = tMOVrr %reg1034<kill>
    Successors according to CFG: 0x8b06a10

entry (0x8b06a10, LLVM BB @0x8b01b30, ID#13):
    Predecessors according to CFG: 0x8b056f0 0x8b06980
        %reg1024<dead> = tMOVrr %reg1030<kill>
        ...

reg1030 and r1 have already been joined. When reg1024 and reg1030 are joined,
r1 live range from function entry to the tMOVrr instruction are dead. Eliminate
r1 from the livein set of the entry BB, not the BB where the copy is.

llvm-svn: 34866

llvm-svn: 34843

llvm-svn: 34768

llvm-svn: 34767

llvm-svn: 34645

llvm-svn: 34595

llvm-svn: 34594

llvm-svn: 34534

llvm-svn: 34503

llvm-svn: 34475

llvm-svn: 34461

llvm-svn: 34428

Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.

llvm-svn: 34399

- When coalescing a copy MI, if its destination is "dead", propagate the
  property to the source MI's destination if there are no intervening uses.
- Detect dead function live-in's and remove them.

llvm-svn: 34383

llvm-svn: 34302

registers. Make sure liveinterval analysis is correctly creating live ranges
for them.

llvm-svn: 34217

llvm-svn: 32698

now cerr, cout, and NullStream resp.

llvm-svn: 32298