llvm-svn: 46961

to the RHS. This simple change allows to compute loop iteration count 
for loops with condition similar to the one in the testcase (which seems 
to be quite common).

llvm-svn: 46959

Added member template "Add" to FoldingSetNodeID that allows "adding" arbitrary
objects to a profile via dispatch to FoldingSetTrait<T>::Profile().

Removed FoldingSetNodeID::AddAPFloat and FoldingSetNodeID::APInt, as their
functionality is now replaced using the above mentioned member template.

llvm-svn: 46957

arbitrary iteration.

The patch:
1) changes SCEVSDivExpr into SCEVUDivExpr,
2) replaces PartialFact() function with BinomialCoefficient(); the 
computations (essentially, the division) in BinomialCoefficient() are 
performed with the apprioprate bitwidth necessary to avoid overflow; 
unsigned division is used instead of the signed one.

Computations in BinomialCoefficient() require support from the code 
generator for APInts. Currently, we use a hack rounding up the 
neccessary bitwidth to the nearest power of 2. The hack is easy to turn 
off in future.

One remaining issue: we assume the divisor of the binomial coefficient 
formula can be computed accurately using 16 bits. It means we can handle 
AddRecs of length up to 9. In future, we should use APInts to evaluate 
the divisor.

Thanks to Nicholas for cooperation!

llvm-svn: 46955

llvm-svn: 46954

Determine whether a spill kills the register it's spilling before insertion rather than trying to undo the kill marker afterwards.

llvm-svn: 46953

Add some notes to the README.

llvm-svn: 46949

llvm-svn: 46948

This fixes the store case, my previous patch just fixed the load
case.  rdar://5707076.

llvm-svn: 46932

llvm-svn: 46931

llvm-svn: 46930

llvm-svn: 46926

no-op).

llvm-svn: 46922

llvm-svn: 46918

llvm-svn: 46916

pabs{b,w,d} are not two address
fix extract-to-mem sse4 ops
add sse4 vector sign extend nodes

llvm-svn: 46915

llvm-svn: 46908

llvm-svn: 46903

llvm-svn: 46902

llvm-svn: 46901

common problem of putting two terminators in the same block.  I can't write
a testcase for this because the .ll parser rejects this before the verifier
can, but this can occur when generating IR.

llvm-svn: 46900

begin adding some methods to use it this way.

llvm-svn: 46899

llvm-svn: 46898

llvm-svn: 46896

llvm-svn: 46895

It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.

llvm-svn: 46893

128-bit vectors need it only when SSE is on.

llvm-svn: 46890

llvm-svn: 46877

llvm-svn: 46876

llvm-svn: 46866

llvm-svn: 46861

to return pointers instead of references, since this is always what
is needed.

llvm-svn: 46857

llvm-svn: 46854

as <unknown>. And make some minor adjustments to the MemOperand
dump format.

llvm-svn: 46853

Before:
_main:
        subq    $8, %rsp
        leaq    _X(%rip), %rax
        movsd   8(%rax), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret
Now:
_main:
        subq    $8, %rsp
        movsd   _X+8(%rip), %xmm1
        movss   _X(%rip), %xmm0
        call    _t
        xorl    %ecx, %ecx
        movl    %ecx, %eax
        addq    $8, %rsp
        ret

Notice there is another idiotic codegen issue that needs to be fixed asap:
xorl    %ecx, %ecx
movl    %ecx, %eax

llvm-svn: 46850

llvm-svn: 46849

llvm-svn: 46848

llvm-svn: 46836

llvm-svn: 46833

initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.

llvm-svn: 46827