integer register to a floating point register. It is not valid to interpret
the value of a floating pointer register as part of a double precision
floating point value after a single precision floating point computational
or move instruction stores its result to the register.

- In the test case, the following code is generated before this patch is
  applied:
mtc1  $zero, $f2    ; unformatted copy to $f2
mov.s $f0, $f2      ; $f0 is in single format
sdc1  $f12, 0($sp)
mov.s $f1, $f2      ; $f1 is in single format
c.eq.d  $f12, $f0   ; $f0 cannot be interpreted as double

- The following code is generated after this patch is applied:
mtc1  $zero, $f0    ; unformatted copy to $f0
mtc1  $zero, $f1    ; unformatted copy to $f1
c.eq.d  $f12, $f0   ; $f0 can be interpreted as double

Bhanu Chetlapalli and Chris Dearman at MIPS technologies reported this bug and
provided the test case.

llvm-svn: 137484

llvm-svn: 137483

llvm-svn: 137482

llvm-svn: 137481

llvm-svn: 137480

llvm-svn: 137479

llvm-svn: 137478

llvm-svn: 137476

llvm-svn: 137470

llvm-svn: 137468

llvm-svn: 137466

llvm-svn: 137463

when building with assertions disabled.

llvm-svn: 137460

MachOWriter: Don't crash on fixups with arithmetic, emit a relocation instead. This matches what as does.

llvm-svn: 137414

Fix by Ivan Baev. Sorry I don't have a unit test, but the fix is obvious so I don't want to delay it.

llvm-svn: 137404

is returned through a bitcast.

llvm-svn: 137402

the retains and releases all use the same SSA pointer value.

Also, don't let CFG hazards disrupt nested retain+release pair
optimizations.

llvm-svn: 137399

rather than plain postorder, so that CFG constructs like single-exit loops
are reliably visited in a sensible order.

llvm-svn: 137398

This is possible now that we now longer provide an interface to iterate
the interference overlaps.

llvm-svn: 137397

llvm-svn: 137389

SCEV unrolling can unroll loops with arbitrary induction variables. It
is a prerequisite for -disable-iv-rewrite performance. It is also
easily handles loops of arbitrary structure including multiple exits
and is generally more robust.

This is under a temporary option to avoid affecting default
behavior for the next couple of weeks. It is needed so that I can
checkin unit tests for updateUnloop.

llvm-svn: 137384

llvm-svn: 137381

The Query class now holds two iterators instead of an InterferenceResult
instance. The iterators are used as bookmarks for repeated
collectInterferingVRegs calls.

llvm-svn: 137380

warning. 

llvm-svn: 137378

llvm-svn: 137375

llvm-svn: 137372

llvm-svn: 137371

llvm-svn: 137370

llvm-svn: 137368

llvm-svn: 137367

llvm-svn: 137364

llvm-svn: 137363

inserts and extracts. This simple combine makes us generate only 1
instruction instead of 11 in the v8 case.

llvm-svn: 137362

llvm-svn: 137359

llvm-svn: 137356

collectInterferingVRegs will be the primary function for interference
checks.

llvm-svn: 137354

llvm-svn: 137353

llvm-svn: 137352

llvm-svn: 137351

No clients are iterating over interference overlaps.

llvm-svn: 137350