llvm-svn: 56456

llvm-svn: 56453

(srl x, (trunc (and y, c))) -> (srl x, (and (trunc y), c))
etc. when both "trunc" and "and" have single uses.

llvm-svn: 56452

Change the calling convention used when tail call optimization is enabled from CC_X86_32_TailCall to CC_X86_32_FastCC.

llvm-svn: 56436

llvm-svn: 56419

llvm-svn: 56418

sarl    $3, %ecx

instead of:

movl    $3, %ecx
sarl    %cl, %edx

This shrinks fast isel 176.gcc by about 2000 instructions (.3%)

llvm-svn: 56413

Handle{Virt,Phys}Reg{Def,Use}. Remove a redundant check
for register zero, and redundant checks for isPhysicalRegister.

llvm-svn: 56412

compute the maximum element directly.

llvm-svn: 56411

correct in the presence of things like EH labels.

llvm-svn: 56410

llvm-svn: 56399

llvm-svn: 56391

of mayReadFromMemory and mayWriteToMemory.

llvm-svn: 56387

Check bits for preferred register.

llvm-svn: 56384

Fix PR2808. When regalloc runs out of register, it spill a physical register around the live interval being allocated. Do not continue to try to spill another register, just grab the physical register and move on.

llvm-svn: 56381

llvm-svn: 56378

llvm-svn: 56377

llvm-svn: 56376

llvm-svn: 56372

results in better code for globals. Also, unbreak the local CSE for
GlobalValue stub loads.

llvm-svn: 56371

have previously been assigned conflicting physreg.

llvm-svn: 56364

llvm-svn: 56352

llvm-svn: 56349

untested, Use::swap() is definitely not done yet

llvm-svn: 56348

Unfortunately this means removing one regression test
of GlobalsModRef because I couldn't work out how to
perform it without MarkModRef.

llvm-svn: 56342

can get the readnone/readonly attributes, and gives them it.
The plan is to remove markmodref (which did the same thing
by querying GlobalsModRef) and delete the analogous
functionality from GlobalsModRef.

llvm-svn: 56341

and redo as linked list walk.  Logic moved into RA.
Per review feedback.

llvm-svn: 56326

Fixes PR 2805

llvm-svn: 56321

catches a fair number of common cases. Note that this currently
causes Fast-ISel to leave behind lots of dead instructions.
Those will be dealt with in subsequent commits.

llvm-svn: 56320

Thanks to Ji Young Park for the patch!

llvm-svn: 56316

llvm-svn: 56315

llvm-svn: 56314

llvm-svn: 56311

defs to be necessarily live.

llvm-svn: 56310

copy of the BURRList scheduler, but with several parts ripped
out, such as backtracking, online topological sort maintenance
(needed by backtracking), the priority queue, and Sethi-Ullman
number computation and maintenance (needed by the priority
queue). As a result of all this, it generates somewhat lower
quality code, but that's its tradeoff for running about 30%
faster than list-burr in -fast mode in many cases.

This is somewhat experimental. Moving forward, major pieces of
this can be refactored with pieces in common with
ScheduleDAGRRList.cpp.

llvm-svn: 56307

Preliminary support for systems which require changing JIT memory regions privilege from read / write to read / executable.

llvm-svn: 56303

llvm-svn: 56301

llvm-svn: 56300

llvm-svn: 56299

over having it in a register. And wait until after checking type
legality before requesting that the callee address be placed in a
register. Also, fix support for calls with void return type.

This speeds up fast-isel isel time by about 15% and reduces
instruction counts by about 3% overall on certain testcases. It also
changes many indirect calls to direct calls.

llvm-svn: 56292