Tblgen doesn't like multiple SDNode<> definitions that map to the sameenum value.  Split them into separate enums.

llvm-svn: 27201

intrinsics as such.

llvm-svn: 27200

Fixes 2006-03-27-LinkedCollapsed.ll

llvm-svn: 27194

llvm-svn: 27192

llvm-svn: 27182

llvm-svn: 27181

llvm-svn: 27180

llvm-svn: 27174

llvm-svn: 27173

llvm-svn: 27171

llvm-svn: 27170

llvm-svn: 27169

llvm-svn: 27168

llvm-svn: 27167

llvm-svn: 27166

floating point cases.

llvm-svn: 27165

llvm-svn: 27164

llvm-svn: 27161

llvm-svn: 27160

llvm-svn: 27159

llvm-svn: 27158

manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.

llvm-svn: 27156

llvm-svn: 27155

llvm-svn: 27154

llvm-svn: 27153

llvm-svn: 27152

llvm-svn: 27151

llvm-svn: 27150

llvm-svn: 27149

llvm-svn: 27148

llvm-svn: 27147

llvm-svn: 27146

llvm-svn: 27144

non-predicate altivec compare intrinsics.

llvm-svn: 27143

intrinsics.

llvm-svn: 27142

llvm-svn: 27139

llvm-svn: 27136

CodeGen/PowerPC/eqv-andc-orc-nor.ll:VNOR/VANDC

llvm-svn: 27135

llvm-svn: 27133

llvm-svn: 27132