exposed with a fastcc problem (breaking pcompress2 on x86 with -enable-x86-fastcc).

When reloading a reused reg, make sure to invalidate the reloaded reg, and
check to see if there are any other pending uses of the same register.

llvm-svn: 26369

Add a minor compile time win, no codegen change.

llvm-svn: 26368

This gets rid of two gotos, which is always nice, and also adds some comments.

No functionality change, this is just a refactor.

llvm-svn: 26367

ADD X, 4
==>
MOV32ri $X+4, ...

llvm-svn: 26366

inline asms! :)

llvm-svn: 26365

llvm-svn: 26364

llvm-svn: 26363

llvm-svn: 26362

Add support for addressing modes.

llvm-svn: 26361

llvm-svn: 26358

llvm-svn: 26357

in the code that does "select C, (X+Y), (X-Y) --> (X+(select C, Y, (-Y)))".
We now compile this loop:

LBB1_1: ; no_exit
        add r6, r2, r3
        subf r3, r2, r3
        cmpwi cr0, r2, 0
        addi r7, r5, 4
        lwz r2, 0(r5)
        addi r4, r4, 1
        blt cr0, LBB1_4 ; no_exit
LBB1_3: ; no_exit
        mr r3, r6
LBB1_4: ; no_exit
        cmpwi cr0, r4, 16
        mr r5, r7
        bne cr0, LBB1_1 ; no_exit

into this instead:

LBB1_1: ; no_exit
        srawi r6, r2, 31
        add r2, r2, r6
        xor r6, r2, r6
        addi r7, r5, 4
        lwz r2, 0(r5)
        addi r4, r4, 1
        add r3, r3, r6
        cmpwi cr0, r4, 16
        mr r5, r7
        bne cr0, LBB1_1 ; no_exit

llvm-svn: 26356

(to allow llvm-gcc4 to build.)

llvm-svn: 26355

llvm-svn: 26351

llvm-svn: 26350

llvm-svn: 26349

llvm-svn: 26348

llvm-svn: 26347

llvm-svn: 26346

llvm-svn: 26345

llvm-svn: 26344

llvm-svn: 26341

llvm-svn: 26340

llvm-svn: 26339

llvm-svn: 26338

  and ExternalSymbol.
- Use C++ code (rather than tblgen'd selection code) to match the above
  mentioned leaf nodes. Do not mutate and nodes and do not record the
  selection in CodeGenMap. These nodes should be safe to duplicate. This is
  a performance win.

llvm-svn: 26335

to inline asms.  Mark some methods const.

llvm-svn: 26334

long long test(long long X) {
  __asm__("foo %0 %L0 %1 %L1" : "=r"(X): "r"(X));
  return X;
}

to:
        foo r2 r3 r2 r3

llvm-svn: 26333

several bugs in inline asm expanded operands.

llvm-svn: 26332

llvm-svn: 26331

llvm-svn: 26330

llvm-svn: 26329

llvm-svn: 26328

llvm-svn: 26327

llvm-svn: 26326

llvm-svn: 26325

1. Various asm printer bug.
2. Lowering bug. Now TargetGlobalAddress is wrapped in X86ISD::TGAWrapper.

llvm-svn: 26324

Suppose base == %eax and it has multiple uses, then instead of
  movl %eax, %ecx
  addl $8, %ecx
use
  leal 8(%eax), %ecx.

llvm-svn: 26323

llvm-svn: 26322

llvm-svn: 26321