llvm-svn: 165834

MapAndConstraints vector.  Also remove the unused Kind argument.

llvm-svn: 165833

Patch by Grzegorz Jablonski.

llvm-svn: 165832

MCParsedAsmOperand class in support of ms-style inline assembly.

llvm-svn: 165830

llvm-svn: 165829

llvm-svn: 165828

Patch by Ashok Thirumurthi.

llvm-svn: 165827

declarations.

llvm-svn: 165826

reimplemented in the AsmParser where it belongs.

llvm-svn: 165825

Completely update one interval at a time instead of collecting live
range fragments to be updated. This avoids building data structures,
except for a single SmallPtrSet of updated intervals.

Also share code between handleMove() and handleMoveIntoBundle().

Add support for moving dead defs across other live values in the
interval. The MI scheduler can do that.

llvm-svn: 165824

specifically related to the deployment settings.
Also some minor alphabetization.

<rdar://problem/12433905>

llvm-svn: 165823

llvm-svn: 165822

or directories, to make sure that they are identifiers that are not
keywords in any dialect. Fixes <rdar://problem/12489495>.

llvm-svn: 165821

llvm-svn: 165820

llvm-svn: 165819

llvm-svn: 165818

When suggesting "foo::bar" as a correction for "fob::bar" we mistakenly
replaced only "bar" with "foo::bar" producing "fob::foo::bar" which was broken.

This corrects that replacement in as many places as I could find & provides
test cases for all those cases I could find a test case for. There are a couple
that don't seem to be reachable (one looks entirely dead, the other just
doesn't seem to ever get called with a namespace to namespace change).

Review by Richard Smith ( http://llvm-reviews.chandlerc.com/D57 ).

llvm-svn: 165817

For 64-bit PowerPC SVR4, an aggregate containing only one
floating-point field (float, double, or long double) must be passed in
a register as though just that field were present.  This patch
addresses the issue during Clang code generation by specifying in the
ABIArgInfo for the argument that the underlying type is passed
directly in a register.  The included test case verifies flat and
nested structs for the three data types.

llvm-svn: 165816

llvm-svn: 165815

0 and 1.  Followup to 165739.

llvm-svn: 165814

PHIElimination inserts IMPLICIT_DEF instructions to guarantee that all
PHI predecessors have a live-out value. These IMPLICIT_DEF values are
not considered to be real interference when coalescing virtual
registers:

  %vreg1 = IMPLICIT_DEF
  %vreg2 = MOV32r0

When joining %vreg1 and %vreg2, the IMPLICIT_DEF instruction and its
value number should simply be erased since the %vreg2 value number now
provides a live-out value for the PHI predecesor block.

llvm-svn: 165813

llvm-svn: 165812

No functional change.

llvm-svn: 165811

llvm-svn: 165810

This is a temporary hack until Bill's project to record command line options
in the LLVM IR is ready. Clang currently sets a default CPU but that isn't
recorded anywhere and it doesn't get used in the final LTO compilation.

llvm-svn: 165809

llvm-svn: 165808

overridden symbols. OK'ed off-line by Doug. 
// rdar://12378793

llvm-svn: 165807

Patch from Daniel Malea that cleans up the process parameters for Process/Thread classes for POSIX and Linux.

llvm-svn: 165806

ConstString Host::GetVendorString();
ConstString Host::GetOSString();

comes from. It now all comes from the Host::GetArchitecture (eSystemDefaultArchitecture) like the Apple build was doing to minimize the number of places that need to be updated when Host::GetArchitecture () is called.

llvm-svn: 165805

Modified patch from Matt Kopec that makes sure the run lock is acquired when attaching and makes sure the pid is being set on linux in the process info.

llvm-svn: 165804

llvm/test/CodeGen/PowerPC/2012-10-12-bitcast.ll: Try to fix failure on non-ppc hosts, to add -mattr=+altivec.

llvm-svn: 165803

On PowerPC, a bitcast of <16 x i8> to i128 may run through a code
path in ExpandRes_BITCAST that attempts to do an intermediate
bitcast to a <4 x i32> vector, and then construct the Hi and Lo parts
of the resulting i128 by pairing up two of those i32 vector elements
each.  The code already recognizes that on a big-endian system, the
first two vector elements form the Hi part, and the final two vector
elements form the Lo part (vice-versa from the little-endian situation).

However, we also need to take endianness into account when forming each
of those separate pairs:  on a big-endian system, vector element 0 is
the *high* part of the pair making up the Hi part of the result, and
vector element 1 is the low part of the pair.  The code currently always
uses vector element 0 as the low part and vector element 1 as the high
part, as is appropriate for little-endian platforms only.

This patch fixes this by swapping the vector elements as they are
paired up as appropriate.

llvm-svn: 165802

llvm-svn: 165797

llvm-svn: 165796

llvm-svn: 165795

llvm-svn: 165794

llvm-svn: 165793

llvm-svn: 165792

Patch by Amara Emerson.

llvm-svn: 165791

llvm-svn: 165790