This makes allocation independent on the ordering of use-def chains.

llvm-svn: 103935

llvm-svn: 103934

This is safe to do because the physreg has been marked UsedInInstr and the kill flag will be set on the last operand using the virtreg if there are more then one.

llvm-svn: 103933

llvm-svn: 103931

through the very long list of call-clobbered registers. We just assume all
registers are clobbered.

llvm-svn: 103930

llvm-svn: 103929

symbol to the file as we have it.  Simplifies out tbss handling.

llvm-svn: 103928

Debug code doesn't use callee saved registers anyway, and the code is simpler this way. Now spillVirtReg always kills, and the isKill parameter is not needed.

llvm-svn: 103927

llvm-svn: 103926

llvm-svn: 103925

Yes, if the redef is a copy, update the old val# with the copy. But make sure to clear the copy field if the redef is not a copy.

llvm-svn: 103922

llvm-svn: 103917

<1xi64> -> i64 to work in MMX registers on hosts where -no-sse
is the default (not mine).  The right thing is
to accept this and make i64->f64 conversions go through memory,
but I don't have time right now.

llvm-svn: 103914

(This worked as of about 6 months ago and I didn't track down
exactly what broke it; I think this fix is appropriate.)

llvm-svn: 103911

llvm-svn: 103903

Patch by Charles Davis and Steven Watanabe!

llvm-svn: 103902

llvm-svn: 103901

llvm-svn: 103898

The implementation in LegalizeIntegerTypes to handle this as 
sint64->float + appropriate power of 2 is subject to double rounding,
considered incorrect by numerics people.  Use this implementation only
when it is safe.  This leads to using library calls in some cases
that produced inline code before, but it's correct now.
(EVTToAPFloatSemantics belongs somewhere else, any suggestions?)

Add a correctly rounding (though not particularly fast) conversion
that uses X87 80-bit computations for x86-32.

7885399, 5901940.  This shows up in gcc.c-torture/execute/ieee/rbug.c
in the gcc testsuite on some platforms.

llvm-svn: 103883

llvm-svn: 103882

This can be extended later on to handle more "complex" constants.

llvm-svn: 103881

Temporary emit it as raw bytes until it will be added to binutils as well.

llvm-svn: 103878

Evzen Muller!

llvm-svn: 103877

patch by Evzen Muller!

llvm-svn: 103876

a condition's grouping. Every other use of Allocatable.test(Hint) groups it the
same way as it is indented, so move the parentheses to agree with that
grouping.

llvm-svn: 103869

llvm-svn: 103868

When working top-down in a basic block, substituting physregs for virtregs, the use-def chains are kept up to date. That means we can recognize a virtreg kill by the use-def chain becoming empty.

This makes the fast allocator independent of incoming kill flags.

llvm-svn: 103866

inliner did in r103653. Why does the always inliner even bother with cost
estimates anyways?

llvm-svn: 103858

llvm-svn: 103857

llvm-svn: 103855

allow target to override it in order to map register classes to illegal
but synthesizable types. e.g. v4i64, v8i64 for ARM / NEON.

llvm-svn: 103854

llvm-svn: 103851

llvm-svn: 103850

instructions.

e.g.
%reg1026<def> = VLDMQ %reg1025<kill>, 260, pred:14, pred:%reg0
%reg1027<def> = EXTRACT_SUBREG %reg1026, 6
%reg1028<def> = EXTRACT_SUBREG %reg1026<kill>, 5
...
%reg1029<def> = REG_SEQUENCE %reg1028<kill>, 5, %reg1027<kill>, 6, %reg1028, 7, %reg1027, 8, %reg1028, 9, %reg1027, 10, %reg1030<kill>, 11, %reg1032<kill>, 12

After REG_SEQUENCE is eliminated, we are left with:

%reg1026<def> = VLDMQ %reg1025<kill>, 260, pred:14, pred:%reg0
%reg1029:6<def> = EXTRACT_SUBREG %reg1026, 6
%reg1029:5<def> = EXTRACT_SUBREG %reg1026<kill>, 5

The regular coalescer will not be able to coalesce reg1026 and reg1029 because it doesn't
know how to combine sub-register indices 5 and 6. Now 2-address pass will consult the
target whether sub-registers 5 and 6 of reg1026 can be combined to into a larger
sub-register (or combined to be reg1026 itself as is the case here). If it is possible, 
it will be able to replace references of reg1026 with reg1029 + the larger sub-register
index.

llvm-svn: 103835

llvm-svn: 103833

setting kill flags.

llvm-svn: 103832

llvm-svn: 103831

llvm-svn: 103830

replace the check with the appropriate predicate. Modify the testcase to reflect
the correct code. (It should be saving callee-saved registers on the stack
allocated by the calling fuction.)

llvm-svn: 103829

llvm-svn: 103828