Commits · 7dee697faa5361fc953909b8d4547f2d08af5cab · Roger Ferrer / llvm-epi-0.8

Jun 07, 2013
- Don't cache the instruction and register info from the TargetMachine, because · 8f26840c
  Bill Wendling authored Jun 07, 2013
```
the internals of TargetMachine could change.

No functionality change intended.

llvm-svn: 183571
```
  8f26840c
Apr 25, 2013

Make function documentation conform to llvm standards. · 128920d9
Preston Gurd authored Apr 25, 2013
```
Expunge all remaining traces and use of live variable information.

llvm-svn: 180577
```
128920d9

This patch adds the X86FixupLEAs pass, which will reduce instruction · 8b7ab4ba

Preston Gurd authored Apr 25, 2013

latency for certain models of the Intel Atom family, by converting
instructions into their equivalent LEA instructions, when it is both
useful and possible to do so.

llvm-svn: 180573

8b7ab4ba