- Aug 31, 2011
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David Greene authored
Stores sizes as uint64_t to avoid possible truncation. llvm-svn: 138901
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Jim Grosbach authored
llvm-svn: 138898
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Bruno Cardoso Lopes authored
llvm-svn: 138897
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Bruno Cardoso Lopes authored
llvm-svn: 138896
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Bruno Cardoso Lopes authored
llvm-svn: 138895
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Bill Wendling authored
The landingpad instruction is required in the landing pad block. Because we're not deleting terminating instructions, the invoke may still jump to here (see Transforms/SCCP/2004-11-16-DeadInvoke.ll). Remove all uses of the landingpad instruction, but keep it around until code-gen can remove the basic block. llvm-svn: 138890
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Owen Anderson authored
llvm-svn: 138889
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Eli Friedman authored
llvm-svn: 138887
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Owen Anderson authored
When performing instruction selection for LDR_PRE_IMM/LDRB_PRE_IMM, we still need to preserve the sign of the index. This fixes miscompilations of Quicksort in the nightly testsuite, and hopefully others as well. <rdar://problem/10046188> llvm-svn: 138885
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Jim Grosbach authored
When we want encoding T3 (the wide encoding), we can explicitly check for that and twiddle the CanAcceptCarrySet accordingly. For now, just correctly handle encodings T1 and T2 when in Thumb2 mode. llvm-svn: 138879
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Eli Friedman authored
Fill in type legalization for MERGE_VALUES in all the various cases. Patch by Micah Villmow. (No testcase because the issue only showed up in an out-of-tree backend.) llvm-svn: 138877
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Owen Anderson authored
llvm-svn: 138874
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Jim Grosbach authored
llvm-svn: 138873
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Eli Friedman authored
Generic expansion for atomic load/store into cmpxchg/atomicrmw xchg; implements 64-bit atomic load/store for ARM. llvm-svn: 138872
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Jim Grosbach authored
Also add instruction aliases for non-.w versions of SBC since they're the same. llvm-svn: 138871
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Devang Patel authored
This fixes ptype.exp gdb testsuite regressions. llvm-svn: 138869
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Eli Friedman authored
llvm-svn: 138868
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Akira Hatanaka authored
llvm-svn: 138866
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David Greene authored
Emit a repeated sequence of bytes using .zero. This saves an enormous amount of asm file space for certain programs. llvm-svn: 138864
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Jim Grosbach authored
When the destination register of an add immediate instruction is explicitly specified, encoding T1 is preferred, else encoding T2 is preferred. llvm-svn: 138862
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Jakob Stoklund Olesen authored
It appears that our use of the imp-use and imp-def flags with sub-registers is not yet robust enough to support this. The failing test case is complicated, I am working on a reduction. <rdar://problem/10044201> llvm-svn: 138861
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Rafael Espindola authored
llvm-svn: 138858
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Eli Friedman authored
Make sure we don't crash when -miphoneos-version-min is specified on x86. Hopefully this will fix gcc testsuite failures. llvm-svn: 138856
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Eric Christopher authored
Patch by Sanjoy Das llvm-svn: 138853
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Bruno Cardoso Lopes authored
- Duplicate some store patterns to their AVX forms! - Catched a bug while restricting the patterns subtarget, fix it and update a testcase to check it properly llvm-svn: 138851
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Bruno Cardoso Lopes authored
llvm-svn: 138850
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Bruno Cardoso Lopes authored
whenever AVX is enabled. llvm-svn: 138849
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Eli Friedman authored
llvm-svn: 138846
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Eli Friedman authored
llvm-svn: 138845
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Rafael Espindola authored
ssa, so it has to be run really early in the pipeline. Any replacement should probably use the SSAUpdater. llvm-svn: 138841
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Owen Anderson authored
Fix issues with disassembly of IT instructions involving condition codes other the EQ/NE. Discovered by roundtrip testing. llvm-svn: 138840
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Owen Anderson authored
llvm-svn: 138837
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Benjamin Kramer authored
llvm-svn: 138836
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Owen Anderson authored
llvm-svn: 138835
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Owen Anderson authored
Fix encoding of Thumb1 B instructions with immediate offsets, which is necessary for round-tripping. llvm-svn: 138834
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- Aug 30, 2011
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Owen Anderson authored
llvm-svn: 138833
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Bill Wendling authored
llvm-svn: 138832
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Owen Anderson authored
llvm-svn: 138829
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Bill Wendling authored
disabled. llvm-svn: 138826
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