llvm-svn: 25890

llvm-svn: 25889

llvm-svn: 25888

llvm-svn: 25887

llvm-svn: 25884

llvm-svn: 25883

llvm-svn: 25882

llvm-svn: 25877

llvm-svn: 25876

of the SELECT_CC, BR_CC, and BRTWOWAY_CC nodes.

llvm-svn: 25875

llvm-svn: 25873

- Added a new format for instructions where the source register is implied
  and it is same as the destination register. Used for pseudo instructions
  that clear the destination register.

llvm-svn: 25872

llvm-svn: 25871

llvm-svn: 25867

Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use.

llvm-svn: 25866

value or the chain going into the load.

llvm-svn: 25863

llvm-svn: 25862

ensure the memory location has not been clobbered.

llvm-svn: 25861

llvm-svn: 25860

it is already available in memory, do a fld directly from there.

llvm-svn: 25859

llvm-svn: 25858

- Use XORP* to implement fneg.

llvm-svn: 25857

llvm-svn: 25856

llvm-svn: 25855

* Rename hasSSE -> hasSSE1 to avoid my continual confusion with 'has any SSE'.
* Add inline asm constraint specification.

llvm-svn: 25854

llvm-svn: 25853

llvm-svn: 25851

bool %test(int %X) {
  %Y = seteq int %X, 13
  ret bool %Y
}

as

_test:
        addi r2, r3, -13
        cntlzw r2, r2
        srwi r3, r2, 5
        blr

rather than

_test:
        cmpwi cr7, r3, 13
        mfcr r2
        rlwinm r3, r2, 31, 31, 31
        blr

This has very little effect on most code, but speeds up analyzer 23% and
mason 11%

llvm-svn: 25848

llvm-svn: 25847

llvm-svn: 25846

llvm-svn: 25845

llvm-svn: 25844

llvm-svn: 25843

llvm-svn: 25842

llvm-svn: 25841

an operand that contains the condcode), making things significantly simpler.

llvm-svn: 25840

a CC as an operand.  Much smaller, much happier.

llvm-svn: 25839

llvm-svn: 25838

llvm-svn: 25837

llvm-svn: 25834