spilled (if it is not already).
- If LR is spilled, use BL to implement far jumps. LR is not used as a GPR
  in thumb mode so it can be clobbered if it is properly spilled / restored
  in prologue / epilogue.
- If LR is force spilled but no far jump has been emitted, try undo'ing the
  spill by:
  push lr -> delete
  pop pc -> bx lr

llvm-svn: 33650

llvm-svn: 33649

llvm-svn: 33644

address nodes.

llvm-svn: 33636

llvm-svn: 33633

llvm-svn: 33632

1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.

NOTEs: 1. Documentation will be updated soon.
       2. llvm-upgrade should be improved to translate csret => sret.
          Before this, there will be some unexpected test fails.
llvm-svn: 33597

llvm-svn: 33569

llvm-svn: 33568

llvm-svn: 33562

Now we can compile llvm-gcc on arm-linux-gnueabi!

llvm-svn: 33558

llvm-svn: 33551

for debugging and exception handling.

llvm-svn: 33550

llvm-svn: 33549

unconditional branch following it. Simply invert the condition and swap
destinations if the conditional branch can reach the destination of the
unconditional branch:
beq L1
b   L2
=>
bne L2
b   L1

llvm-svn: 33548

llvm-svn: 33543

llvm-svn: 33542

llvm-svn: 33537

is unnecessary when we are fixing up a conditional branch since we will be
adding a unconditional branch to the destination of the original branch.

llvm-svn: 33517

llvm-svn: 33515

llvm-svn: 33512

llvm-svn: 33510

llvm-svn: 33509

llvm-svn: 33502

llvm-svn: 33501

llvm-svn: 33497

llvm-svn: 33496

llvm-svn: 33484

llvm-svn: 33474

llvm-svn: 33472

  instructions into one (e.g. tLDRrr, tLDRri -> tLDR).
- Thumb ldrsb and ldrsh only have the [reg, reg] address format. If the
  address is not an add, materialize a 0 immediate into a register and use
  it as the offset field.

llvm-svn: 33470

llvm-svn: 33465

PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary.

llvm-svn: 33460

llvm-svn: 33455

requires 4-bytes alignment.

llvm-svn: 33448

llvm-svn: 33440

llvm-svn: 33433

llvm-svn: 33401

llvm-svn: 33390

llvm-svn: 33389