Commits · 806c42a747e4266e12567677624812d24831d95f · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

Nov 22, 2015
- [X86][FMA] Regenerate tests. · 806c42a7
  Simon Pilgrim authored Nov 22, 2015
  806c42a7
- [X86][AVX] Added load splat tests. · a8e9c8d3
  Simon Pilgrim authored Nov 22, 2015
  a8e9c8d3
- AVX-512: Optimized INSERT_SUBVECTOR for i1 vector types · 0fd11526
  Elena Demikhovsky authored Nov 22, 2015
  0fd11526
- Have a single way for creating unique value names. · d1beb07d
  Rafael Espindola authored Nov 22, 2015
  d1beb07d
Nov 21, 2015
- [MachineInstrBuilder] Support for adding a ConstantPoolIndex MO with an additional offset. · 2829c1cf
  Simon Pilgrim authored Nov 21, 2015
  2829c1cf
- [X86][SSE] Added SSE2 PSUBUS tests · 162b3f21
  Simon Pilgrim authored Nov 21, 2015
  162b3f21
- [X86][SSE] Regenerate TRUNC-SEXT tests · b85acbad
  Simon Pilgrim authored Nov 21, 2015
  b85acbad
- [X86][SSE] Regenerate MINMAX tests · 213f1eda
  Simon Pilgrim authored Nov 21, 2015
  213f1eda
- [X86][SSE] Regenerate PSUBUS tests · 68288265
  Simon Pilgrim authored Nov 21, 2015
  68288265
- [DAGCombiner] Bugfix for lost chain depenedency. · 8f0d2b7f
  Jonas Paulsson authored Nov 21, 2015
  8f0d2b7f
- [X86][AVX] Regenerate AVX splat tests · 96719089
  Simon Pilgrim authored Nov 21, 2015
  96719089
- [X86][AVX512] Added AVX512 VMOVLHPS/VMOVHLPS shuffle decode comments. · d5a15442
  Simon Pilgrim authored Nov 21, 2015
  d5a15442
- [X86][SSE] Legal XMM Register Class ordering for SSE1 · 96cbce61
  Simon Pilgrim authored Nov 21, 2015
  96cbce61
Nov 20, 2015
- [CodeGenPrepare] Create more extloads and fewer ands · 5256fcad
  Geoff Berry authored Nov 20, 2015
  5256fcad
- [ShrinkWrap] Teach ShrinkWrap to handle targets requiring a register scavenger. · 4e89e9f8
  Arnaud A. de Grandmaison authored Nov 20, 2015
  4e89e9f8
- [AArch64]Merge narrow zero stores to a wider store · 80ec0d3f
  Jun Bum Lim authored Nov 20, 2015
  80ec0d3f
- Weak non-function symbols were being accessed directly, which is · c1808367
  Eric Christopher authored Nov 20, 2015
  c1808367
- Fix test case label check · aea3d38d
  Bill Seurer authored Nov 20, 2015
  aea3d38d
- [WebAssembly] Rename SWITCH to TABLESWITCH to match the current wording in the spec. · bb7ce8e4
  Dan Gohman authored Nov 20, 2015
  bb7ce8e4
- [WinEH] Disable most forms of demotion · cc2f6c35
  Reid Kleckner authored Nov 19, 2015
  cc2f6c35
Nov 19, 2015
- [X86][SSE4A] Fix issue with EXTRQI shuffles not starting at the correct start index. · a9912617
  Simon Pilgrim authored Nov 19, 2015
  a9912617
- [AArch64]Extend merging narrow loads into a wider load · 4c35ccac
  Jun Bum Lim authored Nov 19, 2015
  4c35ccac
- [CGP] despeculate expensive cttz/ctlz intrinsics · 4699b8ab
  Sanjay Patel authored Nov 19, 2015
  4699b8ab
- X86: More efficient legalization of wide integer compares · dcc25004
  Hans Wennborg authored Nov 19, 2015
  dcc25004
- AVX-512: Fixed COPY_TO_REGCLASS for mask registers · 7c2c9fd2
  Elena Demikhovsky authored Nov 19, 2015
  7c2c9fd2
- [X86][AVX] Fix lowering of X86ISD::VZEXT_MOVL for 128-bit -> 256-bit extension · 846b64e1
  Simon Pilgrim authored Nov 19, 2015
  846b64e1
- AVX512: Implemented encoding, intrinsics and DAG lowering for VMOVDDUP instructions. · 1f782968
  Igor Breger authored Nov 19, 2015
  1f782968
- Pointers in Masked Load, Store, Gather, Scatter intrinsics · 1ca72e18
  Elena Demikhovsky authored Nov 19, 2015
  1ca72e18
- Revert "Change memcpy/memset/memmove to have dest and source alignments." · 67cf9a72
  Pete Cooper authored Nov 19, 2015
  67cf9a72
- [X86] Enable shrink-wrapping by default. · 46d5c711
  Quentin Colombet authored Nov 19, 2015
  46d5c711
- [AArch64] Enable shrink-wrapping by default. · f6645cce
  Quentin Colombet authored Nov 18, 2015
  f6645cce
Nov 18, 2015
- Change memcpy/memset/memmove to have dest and source alignments. · 72bc23ef
  Pete Cooper authored Nov 18, 2015
  72bc23ef
- [DAGCombiner] Vector constant folding for comparisons · c1a46b72
  Simon Pilgrim authored Nov 18, 2015
  c1a46b72
- ARM: make sure backend is consistent about exception handling method. · 747ae9a7
  Tim Northover authored Nov 18, 2015
  747ae9a7
- [WebAssembly] Make bogus inline asm strings in tests be comments. · 3d4a2066
  Dan Gohman authored Nov 18, 2015
  3d4a2066
- [WebAssembly] Enable register coloring and register stackifying. · 4ba4816b
  Dan Gohman authored Nov 18, 2015
  4ba4816b
- [SelectionDAGBuilder] Make sure DemoteReg ends up in right reg-class. · af722f82
  Jonas Paulsson authored Nov 18, 2015
  af722f82
- [X86][AVX512CD] add mask broadcast intrinsics · 0d957b8b
  Asaf Badouh authored Nov 18, 2015
  0d957b8b
- [X86][AVX] Added 256-bit shuffle splat tests. · e896f9f8
  Simon Pilgrim authored Nov 18, 2015
  e896f9f8
- Stop producing .data.rel sections. · 449711cb
  Rafael Espindola authored Nov 18, 2015
  449711cb