llvm-svn: 61423

llvm-svn: 61420

about other platforms.

llvm-svn: 61415

a symbolic constant. This is unlikely to be intentional, but it
shouldn't crash the compiler.

llvm-svn: 61408

llvm-svn: 61407

llvm-svn: 61404

llvm-svn: 61400

llvm-svn: 61392

This removes all the _8, _16, _32, and _64 opcodes and replaces each
group with an unsuffixed opcode. The MemoryVT field of the AtomicSDNode
is now used to carry the size information. In tablegen, the size-specific
opcodes are replaced by size-independent opcodes that utilize the
ability to compose them with predicates.

This shrinks the per-opcode tables and makes the code that handles
atomics much more concise.

llvm-svn: 61389

Fixed lowering of v8i16 shuffles for v8i16 when we fall back to extract/insert.

llvm-svn: 61365

llvm-svn: 61356

constant shift count that doesn't fit in the shift instruction's
immediate field. This fixes PR3242.

llvm-svn: 61281

that have i32 immediates so that they get selected first. This
currently only matters in the JIT, as assemblers will
automatically use the smallest encoding.

llvm-svn: 61250

llvm-svn: 61244

The EH_frame and .eh symbols are now private, except for darwin9 and earlier.
The patch also fixes the definition of PrivateGlobalPrefix on pcc linux.

llvm-svn: 61242

used, mark the defs as dead.

llvm-svn: 61215

non-entry blocks, so that it doesn't appear use-before-def anywhere.

llvm-svn: 61214

llvm-svn: 61211

and the RegisterScavenger not to expect traditional liveness 
techniques are applicable to these registers, since we don't fully
modify the effects of push and pop after stackification.

llvm-svn: 61179

especially in the case of addresses computed from loop induction
variables.

llvm-svn: 61075

  which are identical to the original patterns.

- Change the multiply with overflow so that we distinguish between signed and
  unsigned multiplication. Currently, unsigned multiplication with overflow
  isn't working!

llvm-svn: 60963

Added support for TRUNC v8i16 to v8i8 for X86 (MMX)

llvm-svn: 60916

ISD::ADD to emit an implicit EFLAGS. This was horribly broken. Instead, replace
the intrinsic with an ISD::SADDO node. Then custom lower that into an
X86ISD::ADD node with a associated SETCC that checks the correct condition code
(overflow or carry). Then that gets lowered into the correct X86::ADDOvf
instruction.

Similar for SUB and MUL instructions.

llvm-svn: 60915

llvm-svn: 60850

Only perform SETO/SETC to JO/JC conversion if extractvalue is coming from an arithmetic with overflow instruction.

llvm-svn: 60844

Fix MachineCodeEmitter to use uintptr_t instead of intptr_t. This avoids some overflow issues. Patch by Thomas Jablin.

llvm-svn: 60828

llvm-svn: 60826

overflow/carry from the "arithmetic with overflow" intrinsics. It searches the
machine basic block from bottom to top to find the SETO/SETC instruction that is
its conditional. If an instruction modifies EFLAGS before it reaches the
SETO/SETC instruction, then it defaults to the normal instruction emission.

llvm-svn: 60807

target-independent way of determining overflow on multiplication. It's very
tricky. Patch by Zoltan Varga!

llvm-svn: 60800

llvm-svn: 60753

complete. For instance, it lowers the common case into this less-than-optimal
code:

        addl    %ecx, %eax
        seto    %cl
        testb   %cl, %cl
        jne     LBB1_2  ## overflow

instead of:

        addl    %ecx, %eax
        jo      LBB1_2  ## overflow

That will come in a future commit.

llvm-svn: 60737

for spotting these!

llvm-svn: 60728

llvm-svn: 60711

llvm-svn: 60705

and use it in x86 address mode folding. Also, make
getRegForValue return 0 for illegal types even if it has a
ValueMap for them, because Argument values are put in the
ValueMap. This fixes PR3181.

llvm-svn: 60696

llvm-svn: 60689

llvm-svn: 60651

llvm-svn: 60632

llvm-svn: 60609

loops when they can be subsumed into addressing modes.

Change X86 addressing mode check to realize that
some PIC references need an extra register.
(I believe this is correct for Linux, if not, I'm sure
someone will tell me.)

llvm-svn: 60608