instead.

llvm-svn: 37937

llvm-svn: 37936

llvm-svn: 37935

llvm-svn: 37934

llvm-svn: 37933

llvm-svn: 37932

llvm-svn: 37931

llvm-svn: 37930

llvm-svn: 37929

llvm-svn: 37928

llvm-svn: 37927

llvm-svn: 37926

llvm-svn: 37925

the virtual function runOnMachineFunction instead. And add access specifiers.

llvm-svn: 37924

llvm-svn: 37923

llvm-svn: 37922

endian swapping should be done, and update the code to use it. This fixes
some register ordering issues on big-endian systems, such as PowerPC,
introduced by the recent illegal by-val arguments changes.

llvm-svn: 37921

llvm-svn: 37920

llvm-svn: 37919

llvm-svn: 37918

llvm-svn: 37917

llvm-svn: 37916

llvm-svn: 37915

llvm-svn: 37914

Almost all occurrences of "bytecode" in the sources have been eliminated.

llvm-svn: 37913

llvm-svn: 37912

llvm-svn: 37911

llvm-svn: 37909

exception handling table if we encounter it multiple
times.  Filters could be folded harder than this, but
that would mean a lot more work for not much gain.

llvm-svn: 37908

llvm-svn: 37907

llvm-svn: 37906

llvm-svn: 37905

llvm-svn: 37900

Instructions with ImmutablePredicateOperand aren't really predicable since their predicates are fixed at isel time.

llvm-svn: 37899

llvm-svn: 37898

llvm-svn: 37897

llvm-svn: 37896

Each ARM use predicate operand is now made up of two components. The new component is the CPSR register.

llvm-svn: 37895

llvm-svn: 37894

llvm-svn: 37893