instruction encoding is encountered, we just return a NULL ARMBasicMCBuilder
instance and the client just returns false to indicate disassembly error.

llvm-svn: 101201

ActOnClassTemplateSpecialization and being very confused.
Fixes PR6514 (for non-templated-scope friends).

llvm-svn: 101198

blocks. Fixes PR6468.

llvm-svn: 101196

measurements of '-fsyntax-only' on combine.c (403.gcc) shows no real performance
change, but now the vector isn't leaked.

llvm-svn: 101195

using the allocator associated with an ASTContext.  This is largely copy-and-paste
from SmallVector, and should be refactored one day.

llvm-svn: 101194

llvm-svn: 101193

IRgen: Move EmitLoadOfBitfieldLValue to use new CGBitfieldInfo::AccessInfo decomposition, instead of computing the access policy itself.
 - This lets the method focus slightly more on emitting clean IR to honor the policy which has been selected. On 403.gcc's combine.c, x86_64, -O0, this reduces the number of lines in the .ll file (~= # of instructions) by 2.5%.

 - No intended functionality change -- at -O3 this should produce equivalent if not identical output. On 403.gcc's combine.c, x86_64, -O3, this isn't quite true and some of the changes are regressions, but I'm not going to worry about that until we move to a new access policy.

 - There is still some room for improvement in the generated IR, in particular we can usually fold the sign-extension of the bit-field into one of the component access. See the FIXME.

llvm-svn: 101192

llvm-svn: 101191

This test relies on iSel lowering dbg_declare intrinsic when CodeGen::OptLevel is None. On PPC side, CodeGen::OptLevel stays to default when -O0 is used on the command line.

llvm-svn: 101190

bit (we're not trying to build a shared library yet) and generating
the X86GenEDInfo.inc and ARMGenEDInfo.inc files as necessary.

llvm-svn: 101188

code the first time.

Fixes PR6827.

llvm-svn: 101184

llvm-svn: 101183

llvm-svn: 101182

such that the entire second half is in memory.  Radar 7855014.

llvm-svn: 101181

NULL.

llvm-svn: 101180

code.  It used to #include the enhanced disassembly
information for the targets it supported straight
out of lib/Target/{X86,ARM,...} but now it uses a
new interface provided by MCDisassembler, and (so
far) implemented by X86 and ARM.

Also removed hacky #define-controlled initialization
of targets in edis.  If clients only want edis to
initialize a limited set of targets, they can set
--enable-targets on the configure command line.

llvm-svn: 101179

IRgen: Enhance CGBitFieldInfo with enough information to fully describe the "policy" with which a bit-field should be accessed.
 - For now, these policies are computed to match the current IRgen strategy, although the new information isn't being used yet (except in -fdump-record-layouts).

 - Design comments appreciated.

llvm-svn: 101178

llvm-svn: 101177

llvm-svn: 101176

llvm-svn: 101173

instead of 7, because we are only looking for even rotate amount.

llvm-svn: 101172

llvm-svn: 101171

llvm-svn: 101170

for non-fragile abi on darwin.

llvm-svn: 101168

Expand postra machine licm's capability a little more. If an instruction's register operands are all loop invariants, then it's safe to hoist it.

llvm-svn: 101167

Sometimes it is desirable to sink instructions along a critical edge:

x = ...
if (a && b) ...
else use(x);

The 'a && b' condition creates a critical edge to the else block, but we still
want to sink the computation of x into the block. The else block is dominated by
the parent block, so we are not pushing instructions into new code paths.

llvm-svn: 101165

on objc classes for Darwin. Radar 7839485.

llvm-svn: 101164

llvm-svn: 101163

Re-apply 101075 and fix it properly. Just reuse the debug info of the branch instruction being optimized. There is no need to --I which can deref off start of the BB.

llvm-svn: 101162

llvm-svn: 101161

patch by Marius Wachtler!

llvm-svn: 101160

in a nightly tester.

llvm-svn: 101158

property (atomic/nonatomic) is of aggregate type with
gc'able member objects) (NeXT runtime).

llvm-svn: 101156

elements with explicit zero values instead of with tail padding.
On an example like this:

struct foo { int a; int b; };

struct foo fooarray[] = {
    {1, 2},
    {4},
};

We now lay this out as:

@fooarray = global [2 x %struct.foo] [%struct.foo { i32 1, i32 2 }, %struct.foo { i32 4, i32 0 }]

instead of as:

@fooarray = global %0 <{ %struct.foo { i32 1, i32 2 }, %1 { i32 4, [4 x i8] zeroinitializer } }>

Preserving both the struct type of the second element, but also the array type of the entire thing.

llvm-svn: 101155

Teach postra machine licm to hoist more obvious invariants, e.g. instructions with no source operands.

llvm-svn: 101154

llvm-svn: 101153

llvm-svn: 101152

llvm-svn: 101151

this caused us to codegen dead globals like this:

struct foo { int a; int b; };

static struct foo fooarray[] = {
  {1, 2},
  {4},
};

llvm-svn: 101150

Without it, there is no reason for a compiler that supports it to
emit the dead static globals that the rewriter labels attribute(used).

llvm-svn: 101149