llvm-svn: 185292

Avoids unused variable warnings in release builds.

llvm-svn: 185271

operator++ on an enum is not legal. clang happens to accept it anyways, I think
that's a known bug.

llvm-svn: 185269

llvm-svn: 185268

llvm-svn: 185267

llvm-svn: 185243

This fixes PR16418, which reports that a function calling
__builtin_unwind_init() asserts. The cause is that this generates a
spill/restore for VRSAVE, and we support that only on Darwin (because VRSAVE is
only really used on Darwin).

The test case checks only that we don't crash. We can add correctness checks
once someone verifies what behavior the function is supposed to have.

llvm-svn: 185235

Change assert("text") to assert(0 && "text").  The first case is a const char *
to bool conversion, which always evaluates to true, never triggering the
assert.  The second case will always trigger the assert.

llvm-svn: 185227

llvm-svn: 185219

Patch By: Alex Deucher

Reviewed-by: Tom Stellard <thomas.stellard@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
llvm-svn: 185209

Based on GCC's output for TLS variables (OP_constNu, x@dtpoff,
OP_lo_user), this implements debug info support for TLS in ELF. Verified
that this output is correct/sufficient on Linux (using gold - if you're
using binutils-ld, you'll need something with the fix for
http://sourceware.org/bugzilla/show_bug.cgi?id=15685 in it).

Support on non-ELF is sort of "arbitrary" at the moment - if Apple folks
want to discuss (or just go ahead & implement) how this should work in
MachO, etc, I'm open.

llvm-svn: 185203

Under certain (evidently rare) circumstances, this code used to convert OR(a,
AND(x, y)) into OR(a, x). This was incorrect.

While there, I've added a comment to the code immediately above.

llvm-svn: 185201

is trying to do.

llvm-svn: 185191

llvm-svn: 185180

This makes it more consistent with the ZeroOrNegativeOneBooleanContent flag

llvm-svn: 185179

llvm-svn: 185178

Fix ABI handling for function
returning bool -- use st.param.b32 to return the value
and use ld.param.b32 in caller to load the return value.

llvm-svn: 185177

llvm-svn: 185176

[NVPTX] Clean up comparison/select/convert patterns and factor out PTX instructions from their patterns

Test case is no breakage

llvm-svn: 185175

[NVPTX] Remove i8 register class.  PTX support for i8 (.b8, .u8, .s8) is rather poor and we're better off just ignoring it and letting LLVM expand all i8 ops out to i16.

llvm-svn: 185174

llvm-svn: 185173

llvm-svn: 185172

llvm-svn: 185171

This patch assigns paired GPRs  for inline asm with
64-bit data on ARM. It's enabled for both ARM and Thumb to support modifiers
like %H, %Q, %R.

llvm-svn: 185169

Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 185162

Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 185161

v2:
  - Remove functions left over from a previous rebase.

Reviewed-by: Vincent Lejeune<vljn at ovi.com>
llvm-svn: 185160

We were generating intrinsics for NEON fixed-point conversions that didn't
exist (e.g. float -> i16). There are two cases to consider:
  + iN is smaller than float. In this case we can do the conversion but need an
    extend or truncate as well.
  + iN is larger than float. In this case using the NEON conversion would be
    incorrect so we don't perform any combining.

llvm-svn: 185158

The mapping between SRS pseudo-instructions and SRS native instructions was incorrect, the correct mapping is:

srsfa -> srsib
srsea -> srsia
srsfd -> srsdb
srsed -> srsda

This fixes <rdar://problem/14214734>.

llvm-svn: 185155

No functionality change.
It should suffice to check the type of a debug info metadata, instead of
calling Verify. For cases where we know the type of a DI metadata, use
assert.

Also update testing cases to make them conform to the format of DI classes.

llvm-svn: 185135

llvm-svn: 185131

llvm-svn: 185086

CostModel: improve the cost model for load/store of non power-of-two types such as <3 x float>, which are popular in graphics.

llvm-svn: 185085

llvm-svn: 185073

llvm-svn: 185071

llvm-svn: 185069

llvm-svn: 185068

Add pseudo conditional store instructions, so that we use:

    branch foo:
    store
foo:

instead of:

    load
    branch foo:
    move
foo:
    store

z196 has real 32-bit and 64-bit conditional stores, but we don't use
any z196 instructions yet.

llvm-svn: 185065

This reverts commit r185020

llvm-svn: 185032

llvm-svn: 185030