Do a scheduling pass ignoring anti-dependencies to identify candidate registers that should be renamed.

llvm-svn: 85939

llvm-svn: 85937

Changes requested (avoid getFunction(), avoid Type creation via isVoidTy(), and avoid redundant isFreeCall cases) in feedback to r85176

llvm-svn: 85936

<rdar://problem/7352605>. When building schedule graph use mayAlias information to avoid chaining loads/stores of spill slots with non-aliased memory ops.

llvm-svn: 85934

Changes (* location in pointer variables, avoiding include, and using APInt::getLimitedValue) based on feedback to r85814

llvm-svn: 85933

functions that don't have local linkage.  Basically, we need to be more
careful about propagating argument information to functions whose results
we aren't tracking.  This fixes a miscompilation of 
LLVMCConfigurationEmitter.cpp when built with an llvm-gcc that has ipsccp
enabled.

llvm-svn: 85923

if zero bytes were read.

llvm-svn: 85922

llvm-svn: 85921

llvm-svn: 85914

llvm-svn: 85909

to follow.

llvm-svn: 85903

llvm-svn: 85896

llvm-svn: 85878

between ARM/Thumb modes and does not require the low bit of the target
address to be set for Thumb.

llvm-svn: 85874

warning from gcc by removing VISIBILITY_HIDDEN attributes.  

llvm-svn: 85873

llvm-svn: 85871

llvm-svn: 85870

llvm-svn: 85869

llvm-svn: 85866

remove a check of isFreeCall: the argument to free is already nocapture so the generic call code works fine.

llvm-svn: 85865

llvm-svn: 85863

llvm-svn: 85861

llvm-svn: 85859

llvm-svn: 85858

llvm-svn: 85850

llvm-svn: 85847

constant pool so they don't get wrapped separately.

llvm-svn: 85844

std::map to DenseMap, exposed on release llvm-gcc bootstrap.

llvm-svn: 85840

llvm-svn: 85827

llvm-svn: 85824

have been passed as a reference.

llvm-svn: 85823

llvm-svn: 85818

llvm-svn: 85814

llvm-svn: 85812

disable it until I can fix it.

llvm-svn: 85810

llvm-svn: 85809

llvm-svn: 85808

Chain dependencies used to enforce memory order should have latency of 0 (except for true dependency of Store followed by aliased Load... we estimate that case with a single cycle of latency assuming the hardware will bypass)

llvm-svn: 85807

llvm-svn: 85806

llvm-svn: 85805