- Nov 05, 2012
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Nadav Rotem authored
llvm-svn: 167402
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Nadav Rotem authored
llvm-svn: 167401
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Andrew Kaylor authored
Prior to this patch RuntimeDyld attempted to re-apply relocations every time reassignSectionAddress was called (via MCJIT::mapSectionAddress). In addition to being inefficient and redundant, this led to a problem when a section was temporarily moved too far away from another section with a relative relocation referencing the section being moved. To fix this, I'm adding a new method (finalizeObject) which the client can call to indicate that it is finished rearranging section addresses so the relocations can safely be applied. llvm-svn: 167400
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Douglas Gregor authored
llvm-svn: 167399
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rdar://problem/12552716Douglas Gregor authored
While we're here, extend the module map to cover most of the newly-added instrinsic headers. Only wmmintrin.h is missing, because it needs to be split into AES/PCLMUL subheaders (as a separate commit). llvm-svn: 167398
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Douglas Gregor authored
header-search options into the module hash. We're just using ADT/Hashing.hpp for this, which isn't as cryptographically strong as I'd like, but it'll do. If someone contributes (say) and MD4 implementation, we'd happily switch to that. llvm-svn: 167397
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Ulrich Weigand authored
to be extended to a full register. This is modeled in the IR by marking the return value (or argument) with a signext or zeroext attribute. However, while these attributes are respected for function arguments, they are currently ignored for function return values by the PowerPC back-end. This patch updates PPCCallingConv.td to ask for the promotion to i64, and fixes LowerReturn and LowerCallResult to implement it. The new test case verifies that both arguments and return values are properly extended when passing them; and also that the optimizers understand incoming argument and return values are in fact guaranteed by the ABI to be extended. The patch caused a spurious breakage in CodeGen/PowerPC/coalesce-ext.ll, since the test case used a "ret" instruction to create a use of an i32 value at the end of the function (to set up data flow as required for what the test is intended to test). Since there's now an implicit promotion to i64, that data flow no longer works as expected. To fix this, this patch now adds an extra "add" to ensure we have an appropriate use of the i32 value. llvm-svn: 167396
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Nadav Rotem authored
llvm-svn: 167395
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Hemant Kulkarni authored
llvm-svn: 167394
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Ulrich Weigand authored
zero-extended to 64 bits. This information is currently provided to the back end by setting "signext" or "zeroext" attributes. However, this is done only for integer types *smaller* than i32, not for i32 itself. This causes clang to generate code violating the ABI, which results in a failure of the tramp3d-v4 test case (due to calling a system library routine without ABI-required extension). This patch implements custom versions of classifyArgumentType and classifyReturnType for PPC64_SVR4_ABIInfo, which are the same as the default versions except that they also classify "int" and "unsigned int" as types needing extending. This fixed tramp3d-v4 on PowerPC64. llvm-svn: 167393
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Jim Grosbach authored
MCJIT supports inline assembly, but requires the asm parser to do so. Make sure to link it in and initialize it. llvm-svn: 167392
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Filipe Cabecinhas authored
llvm-svn: 167391
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Manuel Klimek authored
Patch by Edwin Vane. llvm-svn: 167390
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Greg Clayton authored
- make sure to delet the .cer file on the desktop - added section that describes what to do when you re-install a new OS where you still have an old code signing certificate around. llvm-svn: 167389
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Hal Finkel authored
The Z constraint specifies an r+r memory address, and the y modifier expands to the "r, r" in the asm string. For this initial implementation, the base register is forced to r0 (which has the special meaning of 0 for r+r addressing on PowerPC) and the full address is taken in the second register. In the future, this should be improved. llvm-svn: 167388
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Fariborz Jahanian authored
llvm-svn: 167387
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Adhemerval Zanella authored
This patch expands the SEXTLOAD, ZEXTLOAD, and EXTLOAD operations for vector types when altivec is enabled. llvm-svn: 167386
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Jordan Rose authored
As Anna pointed out, ProgramStateTrait.h is a relatively obscure header, and checker writers may not know to look there to add their own custom state. The base macro that specializes the template remains in ProgramStateTrait.h (REGISTER_TRAIT_WITH_PROGRAMSTATE), which allows the analyzer core to keep using it. llvm-svn: 167385
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Rafael Espindola authored
llvm-svn: 167383
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Richard Osborne authored
'nocapture' attribute. The nocapture attribute only specifies that no copies are made that outlive the function. This isn't the same as there being no copies at all. This fixes PR14045. llvm-svn: 167381
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Chandler Carruth authored
clearing out my backlog of commit mail. llvm-svn: 167380
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Matt Beaumont-Gay authored
llvm-svn: 167379
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Eli Bendersky authored
PR14256: SelectionDAGLowering was renamed to SelectionDAGBuilder a long time ago. Fix references to it in documentation and comments. llvm-svn: 167378
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NAKAMURA Takumi authored
llvm-svn: 167377
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- Nov 04, 2012
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Nick Lewycky authored
to have UsingDirectiveDecl inside anything other than those two. No user-visible functionality change. llvm-svn: 167376
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Fariborz Jahanian authored
well as couple of tests which were not being excercised because of TYPOs. llvm-svn: 167374
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Tobias Grosser authored
Use 'opt < %s' instead of just 'opt %s' to ensure that no temporary files are created. llvm-svn: 167372
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Duncan Sands authored
I'm applying it anyway since it seems to be obviously correct. llvm-svn: 167370
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Lang Hames authored
llvm-svn: 167369
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Craig Topper authored
llvm-svn: 167366
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Jason Molenda authored
The operator== method is a synonym for IsExactMatch(). The essential difference between these two is that IsCompatibleMatch() will say that armv7 and armv7s are compatible and return true. IsExactMatch() will say that armv7 and armv7s are not a match. An armv7s cpu can run either generic armv7 binaries or armv7s binaries (the latter being tuned for it). When we're picking the slice of a universal Mach-O file to load in an armv7s Target, we need to be able to first look for an exact cpu subtype match (armv7s == armv7s) and failing that, looking for a slice with a compatible architecture. Update ObjectContainerUniversalMachO::GetObjectFile to prefer an exact match of the cpu type, falling back to a compatible match if necessary. <rdar://problem/12593515> llvm-svn: 167365
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Seth Cantrell authored
the ellipsis is shorter than the text it replaces llvm-svn: 167364
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- Nov 03, 2012
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Lang Hames authored
compound statement. llvm-svn: 167363
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Dmitri Gribenko authored
checking against a blacklist. llvm-svn: 167362
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Seth Cantrell authored
llvm-svn: 167361
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Seth Cantrell authored
llvm-svn: 167360
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Benjamin Kramer authored
llvm-svn: 167359
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Dmitri Gribenko authored
llvm-svn: 167358
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Dmitri Gribenko authored
llvm-svn: 167357
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Duncan Sands authored
is that the unit test doesn't have IntTy equal to APInt, instead it uses a class derived from APInt. When, as in these lines, an IntTy& reference is returned but is assigned to an APInt&, the compiler destroys the temporary the IntTy& was referring to, leaving the APInt& referring to garbage. This causes the unittest to fail systematically on my machine; it can also be caught by running the test under valgrind. llvm-svn: 167356
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