llvm-svn: 27064

comment.

This fixes 177.mesa, and McCat/09-vor with the td scheduler.

llvm-svn: 27060

Regression/CodeGen/PowerPC/vec_zero.ll

llvm-svn: 27059

llvm-svn: 27056

llvm-svn: 27049

llvm-svn: 27044

llvm-svn: 27040

llvm-svn: 27039

llvm-svn: 27033

llvm-svn: 27024

llvm-svn: 27008

llvm-svn: 27000

llvm-svn: 26997

llvm-svn: 26995

llvm-svn: 26994

llvm-svn: 26991

llvm-svn: 26990

failures from last night

llvm-svn: 26981

llvm-svn: 26980

Make the CBE and V9 backends create their own, since they're the only ones that use it.

llvm-svn: 26974

llvm-svn: 26971

llvm-svn: 26969

llvm-svn: 26967

llvm-svn: 26966

64-bit vector shuffle.

llvm-svn: 26964

llvm-svn: 26959

llvm-svn: 26957

- Don't forget pshufd is only available with sse2.

llvm-svn: 26956

  splat and PSHUFD cases.
- Clean up shuffle / splat matching code.

llvm-svn: 26954

  PSHUFD. We can make permutes entries which point to the undef pointing
  anything we want.
- Change some names to appease Chris.

llvm-svn: 26951

llvm-svn: 26950

llvm-svn: 26949

llvm-svn: 26944

_foo2:
        extsw r2, r3
        std r2, -8(r1)
        lfd f0, -8(r1)
        fcfid f0, f0
        frsp f1, f0
        blr

instead of this:

_foo2:
        lis r2, ha16(LCPI2_0)
        lis r4, 17200
        xoris r3, r3, 32768
        stw r3, -4(r1)
        stw r4, -8(r1)
        lfs f0, lo16(LCPI2_0)(r2)
        lfd f1, -8(r1)
        fsub f0, f1, f0
        frsp f1, f0
        blr

This speeds up Misc/pi from 2.44s->2.09s with LLC and from 3.01->2.18s
with llcbeta (16.7% and 38.1% respectively).

llvm-svn: 26943

which is shifted left two bits before use.  Instructions like STD use this
addressing mode.

llvm-svn: 26942

llvm-svn: 26941

llvm-svn: 26940

llvm-svn: 26939

llvm-svn: 26935

llvm-svn: 26933