the stack slot.  This fixes PR943.

llvm-svn: 30898

chain operand to point to the load being folded. Now we relax this, traversing
up the chain, if it doesn't reach the load, then it's ok. We will create a
TokenFactor (of all the chain operands and the load's chain) to capture all
the control flow dependencies.

llvm-svn: 30897

compile-time performance.

llvm-svn: 30896

llvm-svn: 30895

This compiles both tests in X86/vec_ss_load_fold.ll into:

_test1:
        movss 4(%esp), %xmm0
        subss LCPI1_0, %xmm0
        mulss LCPI1_1, %xmm0
        minss LCPI1_2, %xmm0
        xorps %xmm1, %xmm1
        maxss %xmm1, %xmm0
        cvttss2si %xmm0, %eax
        andl $65535, %eax
        ret

instead of:

_test1:
        movss LCPI1_0, %xmm0
        movss 4(%esp), %xmm1
        subss %xmm0, %xmm1
        movss LCPI1_1, %xmm0
        mulss %xmm0, %xmm1
        movss LCPI1_2, %xmm0
        minss %xmm0, %xmm1
        xorps %xmm0, %xmm0
        maxss %xmm0, %xmm1
        cvttss2si %xmm1, %eax
        andl $65535, %eax
        ret

llvm-svn: 30894

llvm-svn: 30893

llvm-svn: 30892

llvm-svn: 30891

llvm-svn: 30890

llvm-svn: 30889

llvm-svn: 30888

of Regression/TableGen/MultiClass.td.

llvm-svn: 30887

llvm-svn: 30886

llvm-svn: 30885

llvm-svn: 30884

llvm-svn: 30883

llvm-svn: 30882

llvm-svn: 30881

llvm-svn: 30880

llvm-svn: 30879

llvm-svn: 30878

llvm-svn: 30877

llvm-svn: 30876

when the dag combiner simplifies an and mask, notice this and allow those bits
to be missing from the zap mask.

This compiles Alpha/zapnot4.ll into:

        sll $16,3,$0
        zapnot $0,3,$0
        ret $31,($26),1

instead of:

        ldah $0,1($31)
        lda $0,-8($0)
        sll $16,3,$1
        and $1,$0,$0
        ret $31,($26),1

It would be *really* nice to replace the hunk of code in the
AlphaISelDAGToDAG.cpp file that matches (and (srl (x, C), c2) into
(SRL (ZAPNOTi)) with a similar pattern, but I've spent enough time poking
at alpha.  Make andrew will do this.

llvm-svn: 30875

llvm-svn: 30874

As a bonus, use the GOT node instead of the AlphaISD::GOT for internal stuff.

llvm-svn: 30873

llvm-svn: 30872

The dag/inst combiners often 'simplify' the masked value based on whether
or not the bits are live or known zero/one.  This is good and dandy, but
often causes special case patterns to fail, such as alpha's CMPBGE pattern,
which looks like "(set GPRC:$RC, (setuge (and GPRC:$RA, 255), (and GPRC:$RB, 255)))".
Here the pattern for (and X, 255) should match actual dags like (and X, 254) if
the dag combiner proved that the missing bits are already zero (one for 'or').

For CodeGen/Alpha/cmpbge.ll:test2 for example, this results in:

        sll $16,1,$0
        cmpbge $0,$17,$0
        ret $31,($26),1

instead of:

        sll $16,1,$0
        and $0,254,$0
        and $17,255,$1
        cmpule $1,$0,$0
        ret $31,($26),1

... and requires no target-specific code.

llvm-svn: 30871

the second has an and of 254 not 255.

llvm-svn: 30870

llvm-svn: 30869

identical, this is just a refactoring.

llvm-svn: 30868

llvm-svn: 30867

llvm-svn: 30866

llvm-svn: 30865

llvm-svn: 30864

Domagoj Babic, thanks!

llvm-svn: 30863

llvm-svn: 30862

llvm-svn: 30861

llvm-svn: 30860

llvm-svn: 30859