llvm-svn: 28138

llvm-svn: 28135

Refactor TargetMachine, pushing handling of TargetData into the target-specific subclasses.  This has one caller-visible change: getTargetData() now returns a pointer instead of a reference.

This fixes PR 759.

llvm-svn: 28074

llvm-svn: 27358

llvm-svn: 27357

llvm-svn: 27277

unpromoted element type.

llvm-svn: 27273

llvm-svn: 27270

llvm-svn: 27008

llvm-svn: 26797

llvm-svn: 26740

llvm-svn: 26725

we want to canonicalize the other way.

llvm-svn: 26547

llvm-svn: 26503

llvm-svn: 26442

PowerPC/div-2.ll

llvm-svn: 26392

on PowerPC/small-arguments.ll

llvm-svn: 26389

simplify the RHS.  This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:

_test2:
        srwi r2, r3, 1
        xori r3, r2, 40961
        blr

instead of this:

_test2:
        rlwinm r2, r3, 31, 17, 31
        xori r2, r2, 40961
        rlwinm r3, r2, 0, 16, 31
        blr

llvm-svn: 26388

assertzext produces zero bits.

llvm-svn: 26386

llvm-svn: 26345

llvm-svn: 26317

llvm-svn: 26308

llvm-svn: 26305

that the shift may be more easily folded into other operations.

llvm-svn: 26286

llvm-svn: 26252

and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.

llvm-svn: 26238

llvm-svn: 26174

llvm-svn: 25951

llvm-svn: 25946

llvm-svn: 25945

llvm-svn: 25900

Beef up the interface to inline asm constraint parsing, making it more general, useful, and easier to use.

llvm-svn: 25866

Move MaskedValueIsZero from the DAGCombiner to the TargetLowering interface,making isMaskedValueZeroForTargetNode simpler, and useable from other partsof the compiler.

llvm-svn: 25803

llvm-svn: 25798

llvm-svn: 25783

llvm-svn: 25660

llvm-svn: 25609

llvm-svn: 25607

llvm-svn: 24922

* Teach DAG combiner about X86ISD::SETCC by adding a TargetLowering hook.

llvm-svn: 24921