llvm-svn: 121283

llvm-svn: 121281

ordering of thumb mode.

llvm-svn: 121280

llvm-svn: 121279

both forward and backward scheduling. Rename it to
ScoreboardHazardRecognizer (Scoreboard is one word). Remove integer
division from the scoreboard's critical path.

llvm-svn: 121274

llvm-svn: 121272

llvm-svn: 121262

llvm-svn: 121238

This new register allocator is initially identical to RegAllocBasic, but it will
receive all of the tricks that RegAllocBasic won't get.

RegAllocGreedy will eventually replace linear scan.

llvm-svn: 121234

llvm-svn: 121226

llvm-svn: 121224

thumb vs. arm mode differences in WriteNopData().

llvm-svn: 121219

Minor optimization to the use of IntervalMap iterators. They are fairly
heavyweight, so prefer SI.valid() over SI != end().

llvm-svn: 121217

llvm-svn: 121216

the order of the bytes in the data stream is flipped around.

llvm-svn: 121215

llvm-svn: 121212

llvm-svn: 121211

before:
        4 assembler - Number of assembler layout and relaxation steps
    78563 assembler - Number of emitted assembler fragments
  8693904 assembler - Number of emitted object file bytes
   271223 assembler - Number of evaluated fixups
330771677 assembler - Number of fragment layouts
     5958 assembler - Number of relaxed instructions
  2508361 mcexpr    - Number of MCExpr evaluations

real	0m26.123s
user	0m25.694s
sys	0m0.388s

after:

      4 assembler - Number of assembler layout and relaxation steps
  78563 assembler - Number of emitted assembler fragments
8693904 assembler - Number of emitted object file bytes
 271223 assembler - Number of evaluated fixups
 231507 assembler - Number of fragment layouts
   5958 assembler - Number of relaxed instructions
2508361 mcexpr    - Number of MCExpr evaluations

real	0m2.500s
user	0m2.113s
sys	0m0.273s

And yes, the outputs are identical :-)

llvm-svn: 121207

llvm-svn: 121206

This is still work in progress.

llvm-svn: 121205

This speeds up RegAllocBasic by 20%, not counting releaseMemory which becomes
way faster.

llvm-svn: 121201

llvm-svn: 121198

vpush instructions to save / restore VFP / NEON registers like this:
vpush {d8,d10,d11}
vpop {d8,d10,d11}

vpush and vpop do not allow gaps in the register list.
rdar://8728956

llvm-svn: 121197

functionality change.

llvm-svn: 121195

llvm-svn: 121186

llvm-svn: 121182

possible. They were duplicates for everything exception the source pattern
before.

llvm-svn: 121179

llvm-svn: 121176

llvm-svn: 121172

uses of the function's blocks with undef. This code isn't needed,
because BasicBlock's destructor handles such uses. Also, undef isn't
correct, since blockaddresses may still be used for comparisons
with null.

llvm-svn: 121170

Remove target specific node MipsISD::CMov, which is not used because all conditional moves are directly matched using tablegen patterns. If there's a need in the future, we can introduce it again

llvm-svn: 121164

(select (load (load tga0)) (load tga1)) => (load (select (load tga0) tga1))

Thanks to Akira for pointing that.

llvm-svn: 121163

llvm-svn: 121162

llvm-svn: 121160

llvm-svn: 121157

llvm-svn: 121153

Fix absolute recording of differences of symbols in two sections. Reduced from ctor_dtor_count-2.cpp.

llvm-svn: 121152

via their return value instead of an out parameter.

llvm-svn: 121149

comment.

llvm-svn: 121146

llvm-svn: 121142