llvm-svn: 56621

With sse3 and when the source is a load or has multiple uses, favors movddup over shuffp*, pshufd, etc. Without sse3 or when the source is from a register, make use of movlhps

llvm-svn: 56620

meaning sse_regparm (i.e. float/double values go
in XMM0 instead of ST0).  Update documentation
to reflect reality.

llvm-svn: 56619

llvm-svn: 56616

i1 operands are assumed to already by zero-extended.

llvm-svn: 56615

llvm-svn: 56614

llvm-svn: 56613

llvm-svn: 56610

llvm-svn: 56609

llvm-svn: 56608

llvm-svn: 56607

giving the target a chance to materialize constants.

llvm-svn: 56605

llvm-svn: 56604

llvm-svn: 56602

llvm-svn: 56600

a separate function, eliminating duplication between the
add-passes-for-file and add-passes-for-machine-code code.

llvm-svn: 56599

<rdar://problem/6234798> Assertion failed: (!OpInfo.AssignedRegs.Regs.empty() && "Couldn't allocate input reg!")

llvm-svn: 56597

llvm-svn: 56596

Fix patterns for SSE4.1 move and sign extend instructions. Also add instructions which fold VZEXT_MOVL and VZEXT_LOAD.

llvm-svn: 56594

llvm-svn: 56593

for earlyclobbers.  Teach Local RA about earlyclobber,
and add some tests for it.

llvm-svn: 56592

llvm-svn: 56588

llvm-svn: 56587

llvm-svn: 56586

llvm-svn: 56585

llvm-svn: 56584

llvm-svn: 56583

llvm-svn: 56582

llvm-svn: 56581

llvm-svn: 56580

llvm-svn: 56579

llvm-svn: 56578

llvm-svn: 56577

llvm-svn: 56576

llvm-svn: 56575

llvm-svn: 56574

llvm-svn: 56573

llvm-svn: 56572

llvm-svn: 56571

SPU section handling is really huge mess. Replace remaining TAI calls for sections with explicit names in order not to block existing backends during section handling migration. SPU folks! Please consider using new section handling facility someday.

llvm-svn: 56570