- Jan 09, 2011
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Jakob Stoklund Olesen authored
Print virtual registers numbered from 0 instead of the arbitrary FirstVirtualRegister. The first virtual register is printed as %vreg0. TRI::NoRegister is printed as %noreg. llvm-svn: 123107
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Jakob Stoklund Olesen authored
depending on TRI::FirstVirtualRegister. Also use TRI::printReg instead of printing virtual registers directly. llvm-svn: 123101
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- Nov 16, 2010
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Jakob Stoklund Olesen authored
Use amazing new function call technology instead of writing identical code in multiple places. This fixes PR8604. llvm-svn: 119306
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- Oct 08, 2010
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Owen Anderson authored
llvm-svn: 115996
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- Jul 22, 2010
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Owen Anderson authored
llvm-svn: 109045
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- Feb 26, 2010
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Jakob Stoklund Olesen authored
The PowerPC floating point registers can represent both f32 and f64 via the two register classes F4RC and F8RC. F8RC is considered a subclass of F4RC to allow cross-class coalescing. This coalescing only affects whether registers are spilled as f32 or f64. Spill slots must be accessed with load/store instructions corresponding to the class of the spilled register. PPCInstrInfo::foldMemoryOperandImpl was looking at the instruction opcode which is wrong. X86 has similar floating point register classes, but doesn't try to fold memory operands, so there is no problem there. llvm-svn: 97262
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- Feb 10, 2010
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Dan Gohman authored
llvm-svn: 95781
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- Jan 05, 2010
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David Greene authored
llvm-svn: 92587
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- Nov 12, 2009
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David Greene authored
Add a bool flag to StackObjects telling whether they reference spill slots. The AsmPrinter will use this information to determine whether to print a spill/reload comment. Remove default argument values. It's too easy to pass a wrong argument value when multiple arguments have default values. Make everything explicit to trap bugs early. Update all targets to adhere to the new interfaces.. llvm-svn: 87022
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- Nov 04, 2009
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Lang Hames authored
This introduces a new pass, SlotIndexes, which is responsible for numbering instructions for register allocation (and other clients). SlotIndexes numbering is designed to match the existing scheme, so this patch should not cause any changes in the generated code. For consistency, and to avoid naming confusion, LiveIndex has been renamed SlotIndex. The processImplicitDefs method of the LiveIntervals analysis has been moved into its own pass so that it can be run prior to SlotIndexes. This was necessary to match the existing numbering scheme. llvm-svn: 85979
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- Oct 17, 2009
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Evan Cheng authored
Distinquish stack slots from other stack objects. They (and fixed objects) get FixedStack PseudoSourceValues. llvm-svn: 84326
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- Aug 23, 2009
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Chris Lattner authored
llvm-svn: 79842
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- Jul 24, 2009
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Daniel Dunbar authored
LiveInterval, etc to raw_ostream. llvm-svn: 76965
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- Jun 15, 2009
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Evan Cheng authored
- Change register allocation hint to a pair of unsigned integers. The hint type is zero (which means prefer the register specified as second part of the pair) or entirely target dependent. - Allow targets to specify alternative register allocation orders based on allocation hint. Part 2. - Use the register allocation hint system to implement more aggressive load / store multiple formation. - Aggressively form LDRD / STRD. These are formed *before* register allocation. It has to be done this way to shorten live interval of base and offset registers. e.g. v1025 = LDR v1024, 0 v1026 = LDR v1024, 0 => v1025,v1026 = LDRD v1024, 0 If this transformation isn't done before allocation, v1024 will overlap v1025 which means it more difficult to allocate a register pair. - Even with the register allocation hint, it may not be possible to get the desired allocation. In that case, the post-allocation load / store multiple pass must fix the ldrd / strd instructions. They can either become ldm / stm instructions or back to a pair of ldr / str instructions. This is work in progress, not yet enabled. llvm-svn: 73381
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- Jun 14, 2009
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Evan Cheng authored
Move register allocation preference (or hint) from LiveInterval to MachineRegisterInfo. This allows more passes to set them. llvm-svn: 73346
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- May 04, 2009
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Evan Cheng authored
llvm-svn: 70821
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- May 03, 2009
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Evan Cheng authored
In some rare cases, the register allocator can spill registers but end up not utilizing registers at all. The fundamental problem is linearscan's backtracking can end up freeing more than one allocated registers. However, reloads and restores might be folded into uses / defs and freed registers might not be used at all. VirtRegMap keeps track of allocations so it knows what's not used. As a horrible hack, the stack coloring can color spill slots with *free* registers. That is, it replace reload and spills with copies from and to the free register. It unfold instructions that load and store the spill slot and replace them with register using variants. Not yet enabled. This is part 1. More coming. llvm-svn: 70787
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- Mar 31, 2009
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Bill Wendling authored
llvm-svn: 68099
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Bill Wendling authored
llvm-svn: 68092
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- Mar 14, 2009
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Daniel Dunbar authored
llvm-svn: 67000
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- Mar 13, 2009
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Owen Anderson authored
llvm-svn: 66870
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- Mar 11, 2009
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Owen Anderson authored
Reorganization: Move the Spiller out of VirtRegMap.cpp into its own files. No (intended) functionality change. llvm-svn: 66720
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- Mar 09, 2009
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Evan Cheng authored
Yet another case where the spiller marked two uses of the same register on the same instruction as kill. This fixes PR3706. llvm-svn: 66428
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- Mar 08, 2009
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Evan Cheng authored
llvm-svn: 66363
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- Feb 28, 2009
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Evan Cheng authored
llvm-svn: 65679
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- Feb 26, 2009
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Evan Cheng authored
llvm-svn: 65498
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Evan Cheng authored
If an available register falls through to a succ block, unset the last kill. Sorry, it's impossible to reduce a sensible test case. It basically requires the moon and stars to align in order to cause a failure. llvm-svn: 65497
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- Feb 17, 2009
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Evan Cheng authored
A couple of places where reused use operands should be marked kill. This is exposed by recent availability fallthrough changes. llvm-svn: 64745
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- Feb 13, 2009
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Bill Wendling authored
llvm-svn: 64428
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Bill Wendling authored
the new way, where all of the information is passed on SDNodes and machine instructions. llvm-svn: 64427
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- Feb 12, 2009
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Dan Gohman authored
llvm-svn: 64381
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Evan Cheng authored
It's (currently) not safe to keep certain physical registers live across basic blocks, e.g. x86 fp stack registers. llvm-svn: 64374
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Evan Cheng authored
If availability info is kept when fallthrough into a bb, add the available registers to live-in set. llvm-svn: 64372
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Evan Cheng authored
Remove a bogus assertion. It's possible a live-in available value is used by a previous instruction. llvm-svn: 64339
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- Feb 11, 2009
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Evan Cheng authored
Implement PR3495: local spiller optimization. The local spiller can now keep availability information over BB boundaries. It visits BB's in depth first order. After visiting a BB if it find a successor which has a single predecessor it visits the successor next without clearing the availability information. This allows the successor to omit reloads or change them into copies. llvm-svn: 64298
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- Feb 03, 2009
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Bill Wendling authored
llvm-svn: 63599
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- Jan 20, 2009
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Evan Cheng authored
llvm-svn: 62600
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- Dec 02, 2008
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Evan Cheng authored
llvm-svn: 60392
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- Oct 17, 2008
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Evan Cheng authored
Patch by Lang Hames! llvm-svn: 57720
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Evan Cheng authored
llvm-svn: 57673
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